diff options
author | John Machado <john.machado@intel.com> | 2020-01-17 05:27:59 +0530 |
---|---|---|
committer | Petri Latvala <petri.latvala@intel.com> | 2020-01-21 11:30:30 +0200 |
commit | 5cf58d947a02379d2885d6dd4f8bb487cfc3eed2 (patch) | |
tree | 5df1e24b096f507e86e9eb7941b4dd0cc2d67b4c /tools/registers | |
parent | 6a6f7a50c5b2a62f5294b37a810ec7458aaeb774 (diff) |
Add TigerLake Registers file
Added the TigerLake register spec file and a register delta file
that contain additional registers corresponding to TigerLake.
The spec file uses the icelake file along with the newly added
register file for TGL register definations.
Suggested-by: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: John Machado <john.machado@intel.com>
Acked-by: Petri Latvala <petri.latvala@intel.com>
Diffstat (limited to 'tools/registers')
-rw-r--r-- | tools/registers/tigerlake | 2 | ||||
-rw-r--r-- | tools/registers/tigerlake_delta.txt | 319 |
2 files changed, 321 insertions, 0 deletions
diff --git a/tools/registers/tigerlake b/tools/registers/tigerlake new file mode 100644 index 00000000..0cad0ab4 --- /dev/null +++ b/tools/registers/tigerlake @@ -0,0 +1,2 @@ +icelake +tigerlake_delta.txt diff --git a/tools/registers/tigerlake_delta.txt b/tools/registers/tigerlake_delta.txt new file mode 100644 index 00000000..e82049b9 --- /dev/null +++ b/tools/registers/tigerlake_delta.txt @@ -0,0 +1,319 @@ +#CLOCKS +('DPLL4_ENABLE', '0x46018', '') +('DPLL4_CFGCR0', '0x164294', '') +('DPLL4_CFGCR1', '0x164298', '') +('DPLL0_SSC', '0x164b10', '') +('DPLL1_SSC', '0x164c10', '') +('DPLL4_SSC', '0x164e10', '') +('TRANS_CLK_SEL_D', '0x4614c', '') +#PIPE_A_PLANE +('PLANE_OFFSET_4_A', '0x704a4', '') +('PLANE_OFFSET_5_A', '0x705a4', '') +('PLANE_OFFSET_6_A', '0x706a4', '') +('PLANE_OFFSET_7_A', '0x707a4', '') +('PLANE_KEYMSK_4_A', '0x70498', '') +('PLANE_KEYMSK_5_A', '0x70598', '') +('PLANE_KEYMSK_6_A', '0x70698', '') +('PLANE_KEYMSK_7_A', '0x70798', '') +('PLANE_KEYVAL_4_A', '0x70494', '') +('PLANE_KEYVAL_5_A', '0x70594', '') +('PLANE_KEYVAL_6_A', '0x70694', '') +('PLANE_KEYVAL_7_A', '0x70794', '') +('PLANE_STRIDE_4_A', '0x70488', '') +('PLANE_STRIDE_5_A', '0x70588', '') +('PLANE_STRIDE_6_A', '0x70688', '') +('PLANE_STRIDE_7_A', '0x70788', '') +('PLANE_SURF_4_A', '0x7049c', '') +('PLANE_SURF_5_A', '0x7059c', '') +('PLANE_SURF_6_A', '0x7069c', '') +('PLANE_SURF_7_A', '0x7079c', '') +('PLANE_SURFLIVE_4_A', '0x704ac', '') +('PLANE_SURFLIVE_5_A', '0x705ac', '') +('PLANE_SURFLIVE_6_A', '0x706ac', '') +('PLANE_SURFLIVE_7_A', '0x707ac', '') +#PIPE_B_PLANE +('PLANE_OFFSET_4_B', '0x714a4', '') +('PLANE_OFFSET_5_B', '0x715a4', '') +('PLANE_OFFSET_6_B', '0x716a4', '') +('PLANE_OFFSET_7_B', '0x717a4', '') +('PLANE_KEYMSK_4_B', '0x71498', '') +('PLANE_KEYMSK_5_B', '0x71598', '') +('PLANE_KEYMSK_6_B', '0x71698', '') +('PLANE_KEYMSK_7_B', '0x71798', '') +('PLANE_KEYVAL_4_B', '0x71494', '') +('PLANE_KEYVAL_5_B', '0x71594', '') +('PLANE_KEYVAL_6_B', '0x71694', '') +('PLANE_KEYVAL_7_B', '0x71794', '') +('PLANE_STRIDE_4_B', '0x71488', '') +('PLANE_STRIDE_5_B', '0x71588', '') +('PLANE_STRIDE_6_B', '0x71688', '') +('PLANE_STRIDE_7_B', '0x71788', '') +('PLANE_SURF_4_B', '0x7149c', '') +('PLANE_SURF_5_B', '0x7159c', '') +('PLANE_SURF_6_B', '0x7169c', '') +('PLANE_SURF_7_B', '0x7179c', '') +('PLANE_SURFLIVE_4_B', '0x714ac', '') +('PLANE_SURFLIVE_5_B', '0x715ac', '') +('PLANE_SURFLIVE_6_B', '0x716ac', '') +('PLANE_SURFLIVE_7_B', '0x717ac', '') +#PIPE_C_PLANE +('PLANE_OFFSET_4_C', '0x724a4', '') +('PLANE_OFFSET_5_C', '0x725a4', '') +('PLANE_OFFSET_6_C', '0x726a4', '') +('PLANE_OFFSET_7_C', '0x727a4', '') +('PLANE_KEYMSK_4_C', '0x72498', '') +('PLANE_KEYMSK_5_C', '0x72598', '') +('PLANE_KEYMSK_6_C', '0x72698', '') +('PLANE_KEYMSK_7_C', '0x72798', '') +('PLANE_KEYVAL_4_C', '0x72494', '') +('PLANE_KEYVAL_5_C', '0x72594', '') +('PLANE_KEYVAL_6_C', '0x72694', '') +('PLANE_KEYVAL_7_C', '0x72794', '') +('PLANE_STRIDE_4_C', '0x72488', '') +('PLANE_STRIDE_5_C', '0x72588', '') +('PLANE_STRIDE_6_C', '0x72688', '') +('PLANE_STRIDE_7_C', '0x72788', '') +('PLANE_SURF_4_C', '0x7249c', '') +('PLANE_SURF_5_C', '0x7259c', '') +('PLANE_SURF_6_C', '0x7269c', '') +('PLANE_SURF_7_C', '0x7279c', '') +('PLANE_SURFLIVE_4_C', '0x724ac', '') +('PLANE_SURFLIVE_5_C', '0x725ac', '') +('PLANE_SURFLIVE_6_C', '0x726ac', '') +('PLANE_SURFLIVE_7_C', '0x727ac', '') +#PIPE_D_PLANE +('PLANE_AUX_DIST_1_D', '0x731c0', '') +('PLANE_AUX_DIST_2_D', '0x732c0', '') +('PLANE_AUX_DIST_3_D', '0x733c0', '') +('PLANE_AUX_DIST_4_D', '0x734c0', '') +('PLANE_AUX_DIST_5_D', '0x735c0', '') +('PLANE_AUX_DIST_6_D', '0x736c0', '') +('PLANE_AUX_DIST_7_D', '0x737c0', '') +('PLANE_CTL_1_D', '0x73180', '') +('PLANE_CTL_2_D', '0x73280', '') +('PLANE_CTL_3_D', '0x73380', '') +('PLANE_CTL_4_D', '0x73480', '') +('PLANE_CTL_5_D', '0x73580', '') +('PLANE_CTL_6_D', '0x73680', '') +('PLANE_CTL_7_D', '0x73780', '') +('PLANE_BUF_CFG_1_D', '0x7327c', '') +('PLANE_BUF_CFG_2_D', '0x7337c', '') +('PLANE_BUF_CFG_3_D', '0x7347c', '') +('PLANE_BUF_CFG_4_D', '0x7357c', '') +('PLANE_BUF_CFG_5_D', '0x7367c', '') +('PLANE_BUF_CFG_6_D', '0x7377c', '') +('PLANE_BUF_CFG_7_D', '0x7387c', '') +('PLANE_COLOR_CTL_1_D', '0x731cc', '') +('PLANE_COLOR_CTL_2_D', '0x732cc', '') +('PLANE_COLOR_CTL_3_D', '0x733cc', '') +('PLANE_COLOR_CTL_4_D', '0x734cc', '') +('PLANE_COLOR_CTL_5_D', '0x735cc', '') +('PLANE_COLOR_CTL_6_D', '0x736cc', '') +('PLANE_COLOR_CTL_7_D', '0x737cc', '') +('PLANE_OFFSET_1_D', '0x731a4', '' +('PLANE_OFFSET_2_D', '0x732a4', '') +('PLANE_OFFSET_3_D', '0x733a4', '') +('PLANE_OFFSET_4_D', '0x734a4', '') +('PLANE_OFFSET_5_D', '0x735a4', '') +('PLANE_OFFSET_6_D', '0x736a4', '') +('PLANE_OFFSET_7_D', '0x737a4', '') +('PLANE_KEYMAX_1_D', '0x731a0', '') +('PLANE_KEYMAX_2_D', '0x732a0', '') +('PLANE_KEYMAX_3_D', '0x733a0', '') +('PLANE_KEYMAX_4_D', '0x734a0', '') +('PLANE_KEYMAX_5_D', '0x735a0', '') +('PLANE_KEYMAX_6_D', '0x736a0', '') +('PLANE_KEYMAX_7_D', '0x737a0', '') +('PLANE_KEYMSK_1_D', '0x73198', '') +('PLANE_KEYMSK_2_D', '0x73298', '') +('PLANE_KEYMSK_3_D', '0x73398', '') +('PLANE_KEYMSK_4_D', '0x73498', '') +('PLANE_KEYMSK_5_D', '0x73598', '') +('PLANE_KEYMSK_6_D', '0x73698', '') +('PLANE_KEYMSK_7_D', '0x73798', '') +('PLANE_KEYVAL_1_D', '0x73194', '') +('PLANE_KEYVAL_2_D', '0x73294', '') +('PLANE_KEYVAL_3_D', '0x73394', '') +('PLANE_KEYVAL_4_D', '0x73494', '') +('PLANE_KEYVAL_5_D', '0x73594', '') +('PLANE_KEYVAL_6_D', '0x73694', '') +('PLANE_KEYVAL_7_D', '0x73794', '') +('PLANE_STRIDE_1_D', '0x73188', '') +('PLANE_STRIDE_2_D', '0x73288', '') +('PLANE_STRIDE_3_D', '0x73388', '') +('PLANE_STRIDE_4_D', '0x73488', '') +('PLANE_STRIDE_5_D', '0x73588', '') +('PLANE_STRIDE_6_D', '0x73688', '') +('PLANE_STRIDE_7_D', '0x73788', '') +('PLANE_SURF_1_D', '0x7319c', '') +('PLANE_SURF_2_D', '0x7329c', '') +('PLANE_SURF_3_D', '0x7339c', '') +('PLANE_SURF_4_D', '0x7349c', '') +('PLANE_SURF_5_D', '0x7359c', '') +('PLANE_SURF_6_D', '0x7369c', '') +('PLANE_SURF_7_D', '0x7379c', '') +('PLANE_SURFLIVE_1_D', '0x731ac', '') +('PLANE_SURFLIVE_2_D', '0x732ac', '') +('PLANE_SURFLIVE_3_D', '0x733ac', '') +('PLANE_SURFLIVE_4_D', '0x734ac', '') +('PLANE_SURFLIVE_5_D', '0x735ac', '') +('PLANE_SURFLIVE_6_D', '0x736ac', '') +('PLANE_SURFLIVE_7_D', '0x737ac', '') +('PLANE_POS_1_D', '0x7318c', '') +('PLANE_POS_2_D', '0x7328c', '') +('PLANE_POS_3_D', '0x7338c', '') +('PLANE_POS_4_D', '0x7348c', '') +('PLANE_POS_5_D', '0x7358c', '') +('PLANE_POS_6_D', '0x7368c', '') +('PLANE_POS_7_D', '0x7378c', '') +('PLANE_SIZE_1_D', '0x73190', '') +('PLANE_SIZE_2_D', '0x73290', '') +('PLANE_SIZE_3_D', '0x73390', '') +('PLANE_SIZE_4_D', '0x73490', '') +('PLANE_SIZE_5_D', '0x73590', '') +('PLANE_SIZE_6_D', '0x73690', '') +('PLANE_SIZE_7_D', '0x73790', '') +('PLANE_WM_1_D_0', '0x73240', '') +('PLANE_WM_1_D_1', '0x73244', '') +('PLANE_WM_1_D_2', '0x73248', '') +('PLANE_WM_1_D_3', '0x7324c', '') +('PLANE_WM_1_D_4', '0x73250', '') +('PLANE_WM_1_D_5', '0x73254', '') +('PLANE_WM_1_D_6', '0x73258', '') +('PLANE_WM_1_D_7', '0x7325c', '') +('PLANE_WM_2_D_0', '0x73340', '') +('PLANE_WM_2_D_1', '0x73344', '') +('PLANE_WM_2_D_2', '0x73348', '') +('PLANE_WM_2_D_3', '0x7334c', '') +('PLANE_WM_2_D_4', '0x73350', '') +('PLANE_WM_2_D_5', '0x73354', '') +('PLANE_WM_2_D_6', '0x73358', '') +('PLANE_WM_2_D_7', '0x7335c', '') +('PLANE_WM_3_D_0', '0x73440', '') +('PLANE_WM_3_D_1', '0x73444', '') +('PLANE_WM_3_D_2', '0x73448', '') +('PLANE_WM_3_D_3', '0x7344c', '') +('PLANE_WM_3_D_4', '0x73450', '') +('PLANE_WM_3_D_5', '0x73454', '') +('PLANE_WM_3_D_6', '0x73458', '') +('PLANE_WM_3_D_7', '0x7345c', '') +('PLANE_WM_4_D_0', '0x73540', '') +('PLANE_WM_4_D_1', '0x73544', '') +('PLANE_WM_4_D_2', '0x73548', '') +('PLANE_WM_4_D_3', '0x7354c', '') +('PLANE_WM_4_D_4', '0x73550', '') +('PLANE_WM_4_D_5', '0x73554', '') +('PLANE_WM_4_D_6', '0x73558', '') +('PLANE_WM_4_D_7', '0x7355c', '') +('PLANE_WM_5_D_0', '0x73640', '') +('PLANE_WM_5_D_1', '0x73644', '') +('PLANE_WM_5_D_2', '0x73648', '') +('PLANE_WM_5_D_3', '0x7364c', '') +('PLANE_WM_5_D_4', '0x73650', '') +('PLANE_WM_5_D_5', '0x73654', '') +('PLANE_WM_5_D_6', '0x73658', '') +('PLANE_WM_5_D_7', '0x7365c', '') +('PLANE_WM_6_D_0', '0x73740', '') +('PLANE_WM_6_D_1', '0x73744', '') +('PLANE_WM_6_D_2', '0x73748', '') +('PLANE_WM_6_D_3', '0x7374c', '') +('PLANE_WM_6_D_4', '0x73750', '') +('PLANE_WM_6_D_5', '0x73754', '') +('PLANE_WM_6_D_6', '0x73758', '') +('PLANE_WM_6_D_7', '0x7375c', '') +('PLANE_WM_7_D_0', '0x73840', '') +('PLANE_WM_7_D_1', '0x73844', '') +('PLANE_WM_7_D_2', '0x73848', '') +('PLANE_WM_7_D_3', '0x7384c', '') +('PLANE_WM_7_D_4', '0x73850', '') +('PLANE_WM_7_D_5', '0x73854', '') +('PLANE_WM_7_D_6', '0x73858', '') +('PLANE_WM_7_D_7', '0x7385c', '') +('PLANE_WM_TRANS_1_D', '0x73268', '') +('PLANE_WM_TRANS_2_D', '0x73368', '') +('PLANE_WM_TRANS_3_D', '0x73468', '') +('PLANE_WM_TRANS_4_D', '0x73568', '') +('PLANE_WM_TRANS_5_D', '0x73668', '') +('PLANE_WM_TRANS_6_D', '0x73768', '') +('PLANE_WM_TRANS_7_D', '0x73868', '') +# PIPE_D_CURSOR_PLANE +('CUR_BUF_CFG_D', '0x7317c', '') +('CUR_BASE_D', '0x73084', '') +('CUR_CTL_D', '0x73080', '') +('CUR_FBC_CTL_D', '0x730a0', '') +('CUR_POS_D', '0x73088', '') +('CUR_SURFLIVE_D', '0x730ac', '') +('CUR_WM_0_D', '0x73140', '') +('CUR_WM_1_D', '0x73144', '') +('CUR_WM_2_D', '0x73148', '') +('CUR_WM_3_D', '0x7314c', '') +('CUR_WM_4_D', '0x73150', '') +('CUR_WM_5_D', '0x73154', '') +('CUR_WM_6_D', '0x73158', '') +('CUR_WM_7_D', '0x7315c', '') +('CUR_WM_TRANS_D', '0x73168', '') +#PIPE_SCALER_D +('PS_CTRL_1_D', '0x69980', '') +('PS_CTRL_2_D', '0x69a80', '') +('PS_ECC_STAT_1_D', '0x699d0', '') +('PS_ECC_STAT_2_D', '0x69ad0', '') +('PS_HPHASE_1_D', '0x69994', '') +('PS_HPHASE_2_D', '0x69a94', '') +('PS_HSCALE_1_D', '0x69990', '') +('PS_HSCALE_2_D', '0x69a90', '') +('PS_PWR_GATE_1_D', '0x69960', '') +('PS_PWR_GATE_2_D', '0x69a60', '') +('PS_VPHASE_1_D', '0x69988', '') +('PS_VPHASE_2_D', '0x69a88', '') +('PS_VSCALE_1_D', '0x69984', '') +('PS_VSCALE_2_D', '0x69a84', '') +('PS_WIN_POS_1_D', '0x69970', '') +('PS_WIN_POS_2_D', '0x69a70', '') +('PS_WIN_SZ_1_D', '0x69974', '') +('PS_WIN_SZ_2_D', '0x69a74', '') +#TRANSCODER_D_CONTROL +('TRANS_CONF_D', '0x73008', '') +#TRANSCODER_DSI_CONTROL +('TRANS_CONF_DSI0', '0x7b008', '') +('TRANS_CONF_DSI1', '0x7b808', '') +# TRANSCODER_D_TIMING +('TRANS_HBLANK_D', '0x63004', '') +('TRANS_HSYNC_D', '0x63008', '') +('TRANS_HTOTAL_D', '0x63000', '') +('TRANS_MULT_D', '0x6302c', '') +('TRANS_SPACE_D', '0x63024', '') +('TRANS_VBLANK_D', '0x63010', '') +('TRANS_VSYNC_D', '0x63014', '') +('TRANS_VSYNCSHIFT_D', '0x63028', '') +('TRANS_VTOTAL_D', '0x6300c', '') +# TRANSCODER_DSI_TIMING +('TRANS_HSYNC_DSI0', '0x6b008', '') +('TRANS_HSYNC_DSI1', '0x6b808', '') +('TRANS_HTOTAL_DSI0', '0x6b000', '') +('TRANS_HTOTAL_DSI1', '0x6b800', '') +('TRANS_SPACE_DSI0', '0x6b024', '') +('TRANS_SPACE_DSI1', '0x6b824', '') +('TRANS_VBLANK_DSI0', '0x6b010', '') +('TRANS_VBLANK_DSI1', '0x6b810', '') +('TRANS_VSYNC_DSI0', '0x6b014', '') +('TRANS_VSYNC_DSI1', '0x6b814', '') +('TRANS_VSYNCSHIFT_DSI0', '0x6b028', '') +('TRANS_VSYNCSHIFT_DSI1', '0x6b828', '') +('TRANS_VTOTAL_DSI0', '0x6b00c', '') +('TRANS_VTOTAL_DSI1', '0x6b80c', '') +# TRANSCODER_D_M_N +('TRANS_DATAM1_D', '0x63030', '') +('TRANS_DATAN1_D', '0x63034', '') +('TRANS_LINKM1_D', '0x63040', '') +('TRANS_LINKN1_D', '0x63044', '') +# TRANSCODER_D_DDI_CONTROL +('TRANS_DDI_FUNC_CTL_D', '0x63400', '') +('TRANS_MSA_MISC_D', '0x63410', '') +# TRANSCODER_DSI_DDI_CONTROL +('TRANS_DDI_FUNC_CTL_DSI0', '0x6b400', '') +('TRANS_DDI_FUNC_CTL_DSI1', '0x6bc00', '') +# MBUS_CTL +('MBUS_DBOX_CTL_D', '0x7303c', '') +# WATERMARK +('WM_LINETIME_D', '0x4527c', '') + |