summaryrefslogtreecommitdiff
path: root/tools
diff options
context:
space:
mode:
authorChon Ming Lee <chon.ming.lee@intel.com>2013-12-04 20:44:33 +0800
committerVille Syrjälä <ville.syrjala@linux.intel.com>2013-12-05 13:04:36 +0200
commit0b67c0c421fb736b5086f69a7cc5415f66c3d369 (patch)
tree70f59961b53ce4371c793028e9e9c7a6911a9a89 /tools
parentf5643c4a270baa4da33676950e36b1681d6d93dc (diff)
Update dpio read/write to take in extra PHY parameter.
The extra parameter is for future platform. Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Diffstat (limited to 'tools')
-rw-r--r--tools/intel_dpio_read.c2
-rw-r--r--tools/intel_dpio_write.c2
-rw-r--r--tools/quick_dump/chipset.i4
-rw-r--r--tools/quick_dump/quick_dump.py2
-rwxr-xr-xtools/quick_dump/reg_access.py6
5 files changed, 9 insertions, 7 deletions
diff --git a/tools/intel_dpio_read.c b/tools/intel_dpio_read.c
index c0c904a6..6202ad99 100644
--- a/tools/intel_dpio_read.c
+++ b/tools/intel_dpio_read.c
@@ -56,7 +56,7 @@ int main(int argc, char** argv)
intel_register_access_init(dev, 0);
- val = intel_dpio_reg_read(reg);
+ val = intel_dpio_reg_read(reg, 0);
printf("Read DPIO register: 0x%x - Value : 0x%x\n", reg, val);
diff --git a/tools/intel_dpio_write.c b/tools/intel_dpio_write.c
index f8429990..3d2f2978 100644
--- a/tools/intel_dpio_write.c
+++ b/tools/intel_dpio_write.c
@@ -57,7 +57,7 @@ int main(int argc, char** argv)
intel_register_access_init(dev, 0);
- intel_dpio_reg_write(reg, val);
+ intel_dpio_reg_write(reg, val, 0);
intel_register_access_fini();
diff --git a/tools/quick_dump/chipset.i b/tools/quick_dump/chipset.i
index f1cc3685..c5f4b563 100644
--- a/tools/quick_dump/chipset.i
+++ b/tools/quick_dump/chipset.i
@@ -16,7 +16,7 @@ extern uint32_t intel_register_write(uint32_t reg, uint32_t val);
extern void intel_register_access_fini();
extern int intel_register_access_needs_fakewake();
extern unsigned short pcidev_to_devid(struct pci_device *pci_dev);
-extern uint32_t intel_dpio_reg_read(uint32_t reg);
+extern uint32_t intel_dpio_reg_read(uint32_t reg, int phy);
%}
extern int is_sandybridge(unsigned short pciid);
@@ -30,4 +30,4 @@ extern uint32_t intel_register_write(uint32_t reg, uint32_t val);
extern void intel_register_access_fini();
extern int intel_register_access_needs_fakewake();
extern unsigned short pcidev_to_devid(struct pci_device *pci_dev);
-extern uint32_t intel_dpio_reg_read(uint32_t reg);
+extern uint32_t intel_dpio_reg_read(uint32_t reg, int phy);
diff --git a/tools/quick_dump/quick_dump.py b/tools/quick_dump/quick_dump.py
index ff151d17..77744d49 100644
--- a/tools/quick_dump/quick_dump.py
+++ b/tools/quick_dump/quick_dump.py
@@ -21,7 +21,7 @@ def parse_file(file):
for line in file:
register = ast.literal_eval(line)
if register[2] == 'DPIO':
- val = reg.dpio_read(register[1])
+ val = reg.dpio_read(register[1], 0)
else:
val = reg.read(register[1])
intreg = int(register[1], 16)
diff --git a/tools/quick_dump/reg_access.py b/tools/quick_dump/reg_access.py
index 113a3cf7..cf6e0a46 100755
--- a/tools/quick_dump/reg_access.py
+++ b/tools/quick_dump/reg_access.py
@@ -27,9 +27,11 @@ def get_wake():
mt_forcewake_get()
vlv_forcewake_get()
-def dpio_read(reg):
+def dpio_read(reg, phy):
reg = int(reg, 16)
- val = chipset.intel_dpio_reg_read(reg)
+ phy = int(phy)
+
+ val = chipset.intel_dpio_reg_read(reg, phy)
return val