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authorDaniel Mrzyglod <daniel.t.mrzyglod@intel.com>2019-08-29 15:10:37 +0200
committerChris Wilson <chris@chris-wilson.co.uk>2019-08-29 17:05:29 +0100
commitd38950f2c0ca846816c9b0e6601181cc7e1982de (patch)
treed0693ca7e6bb61d387f4ca2e75c93fa4e265e235 /tools
parent6e3af15a9e9dcd6159a74e5e66aec3e1c1347d51 (diff)
lib/intel_mmio: add additional api for multiple devices
Library was limited for reading registers for only one device at a time in igt tests. Changes in this patch give as oportunity to test multiple devices in the same time. v8: pack and rename structure, remove unnecessary field v7: remove unnecessary code v6: Reword patch. Cosmetic changes. Cc: Antonio Argenziano <antonio.argenziano@intel.com> Cc: Daniele Spurio Ceraolo <daniele.ceraolospurio@intel.com> Cc: Katarzyna Dec <katarzyna.dec@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Petri Latvala <petri.latvala@intel.com> Cc: Zbigniew KempczyƄski <zbigniew.kempczynski@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'tools')
-rw-r--r--tools/intel_audio_dump.c6
-rw-r--r--tools/intel_backlight.c3
-rw-r--r--tools/intel_display_poller.c5
-rw-r--r--tools/intel_forcewaked.c15
-rw-r--r--tools/intel_gpu_time.c3
-rw-r--r--tools/intel_infoframes.c5
-rw-r--r--tools/intel_l3_parity.c11
-rw-r--r--tools/intel_lid.c3
-rw-r--r--tools/intel_panel_fitter.c5
-rw-r--r--tools/intel_perf_counters.c10
-rw-r--r--tools/intel_reg.c23
-rw-r--r--tools/intel_reg_checker.c3
-rw-r--r--tools/intel_watermark.c42
13 files changed, 78 insertions, 56 deletions
diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c
index 726bb4b6..6d11659e 100644
--- a/tools/intel_audio_dump.c
+++ b/tools/intel_audio_dump.c
@@ -42,6 +42,7 @@ static uint32_t devid;
static int aud_reg_base = 0; /* base address of audio registers */
static int disp_reg_base = 0; /* base address of display registers */
+
#define IS_HASWELL_PLUS(devid) (IS_HASWELL(devid) || IS_BROADWELL(devid))
#define BITSTO(n) (n >= sizeof(long) * 8 ? ~0 : (1UL << (n)) - 1)
@@ -2464,6 +2465,7 @@ static void dump_braswell(void)
int main(int argc, char **argv)
{
struct pci_device *pci_dev;
+ struct intel_mmio_data mmio_data;
pci_dev = intel_get_pci_device();
devid = pci_dev->device_id; /* XXX not true when mapping! */
@@ -2471,9 +2473,9 @@ int main(int argc, char **argv)
do_self_tests();
if (argc == 2)
- intel_mmio_use_dump_file(argv[1]);
+ intel_mmio_use_dump_file(&mmio_data, argv[1]);
else
- intel_mmio_use_pci_bar(pci_dev);
+ intel_mmio_use_pci_bar(&mmio_data, pci_dev);
printf("%s audio registers:\n\n", intel_get_device_info(devid)->codename);
if (IS_VALLEYVIEW(devid)) {
diff --git a/tools/intel_backlight.c b/tools/intel_backlight.c
index 067fd418..edf06022 100644
--- a/tools/intel_backlight.c
+++ b/tools/intel_backlight.c
@@ -38,9 +38,10 @@
int main(int argc, char** argv)
{
+ struct intel_mmio_data mmio_data;
uint32_t current, max;
- intel_mmio_use_pci_bar(intel_get_pci_device());
+ intel_mmio_use_pci_bar(&mmio_data, intel_get_pci_device());
current = INREG(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
max = INREG(BLC_PWM_PCH_CTL2) >> 16;
diff --git a/tools/intel_display_poller.c b/tools/intel_display_poller.c
index 51f5b9a5..f4797a20 100644
--- a/tools/intel_display_poller.c
+++ b/tools/intel_display_poller.c
@@ -962,6 +962,7 @@ static void __attribute__((noreturn)) usage(const char *name)
int main(int argc, char *argv[])
{
+ struct intel_mmio_data mmio_data;
int i;
int pipe = 0, bit = 0, target_scanline = 0, target_fuzz = 1;
bool test_pixelcount = false;
@@ -1187,7 +1188,7 @@ int main(int argc, char *argv[])
break;
}
- intel_register_access_init(intel_get_pci_device(), 0, -1);
+ intel_register_access_init(&mmio_data ,intel_get_pci_device(), 0, -1);
printf("%s?\n", test_name(test, pipe, bit, test_pixelcount));
@@ -1262,7 +1263,7 @@ int main(int argc, char *argv[])
assert(0);
}
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
if (quit)
return 0;
diff --git a/tools/intel_forcewaked.c b/tools/intel_forcewaked.c
index 02fbf888..87b26d43 100644
--- a/tools/intel_forcewaked.c
+++ b/tools/intel_forcewaked.c
@@ -57,14 +57,15 @@ help(char *prog) {
}
static int
-is_alive(void) {
+is_alive(struct intel_mmio_data *mmio_data) {
/* Read the timestamp, which should *almost* always be !0 */
- return (intel_register_read(0x2358) != 0);
+ return (intel_register_read(mmio_data, 0x2358) != 0);
}
int main(int argc, char *argv[])
{
int ret;
+ struct intel_mmio_data mmio_data;
if (argc > 2 || (argc == 2 && !strncmp(argv[1], "-h", 2))) {
help(argv[1]);
@@ -80,7 +81,7 @@ int main(int argc, char *argv[])
INFO_PRINT("started daemon");
}
- ret = intel_register_access_init(intel_get_pci_device(), 1, -1);
+ ret = intel_register_access_init(&mmio_data, intel_get_pci_device(), 1, -1);
if (ret) {
INFO_PRINT("Couldn't init register access\n");
exit(1);
@@ -88,16 +89,16 @@ int main(int argc, char *argv[])
INFO_PRINT("Forcewake locked\n");
}
while(1) {
- if (!is_alive()) {
+ if (!is_alive(&mmio_data)) {
INFO_PRINT("gpu reset? restarting daemon\n");
- intel_register_access_fini();
- ret = intel_register_access_init(intel_get_pci_device(), 1, -1);
+ intel_register_access_fini(&mmio_data);
+ ret = intel_register_access_init(&mmio_data, intel_get_pci_device(), 1, -1);
if (ret)
INFO_PRINT("Reg access init fail\n");
}
sleep(1);
}
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
INFO_PRINT("Forcewake unlock\n");
if (daemonized) {
diff --git a/tools/intel_gpu_time.c b/tools/intel_gpu_time.c
index 56d65fe0..11bf7354 100644
--- a/tools/intel_gpu_time.c
+++ b/tools/intel_gpu_time.c
@@ -65,9 +65,10 @@ int main(int argc, char **argv)
uint64_t ring_idle = 0, ring_time = 0;
struct timeval start, end;
static struct rusage rusage;
+ struct intel_mmio_data mmio_data;
int status;
- intel_mmio_use_pci_bar(intel_get_pci_device());
+ intel_mmio_use_pci_bar(&mmio_data, intel_get_pci_device());
if (argc == 1) {
fprintf(stderr, "usage: %s cmd [args...]\n", argv[0]);
diff --git a/tools/intel_infoframes.c b/tools/intel_infoframes.c
index 2ef5d4fd..d4bf528c 100644
--- a/tools/intel_infoframes.c
+++ b/tools/intel_infoframes.c
@@ -264,6 +264,7 @@ const char *dip_frequency_names[] = {
struct pci_device *pci_dev;
int gen = 0;
+struct intel_mmio_data mmio_data;
static const char *spd_source_to_string(SourceDevice source)
{
@@ -1108,7 +1109,7 @@ int main(int argc, char *argv[])
" perfectly: the Kernel might undo our changes.\n");
pci_dev = intel_get_pci_device();
- intel_register_access_init(pci_dev, 0, -1);
+ intel_register_access_init(&mmio_data, pci_dev, 0, -1);
intel_check_pch();
if (IS_GEN4(pci_dev->device_id))
@@ -1256,6 +1257,6 @@ int main(int argc, char *argv[])
}
out:
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
return ret;
}
diff --git a/tools/intel_l3_parity.c b/tools/intel_l3_parity.c
index 4179c5ae..06a185c9 100644
--- a/tools/intel_l3_parity.c
+++ b/tools/intel_l3_parity.c
@@ -176,6 +176,7 @@ static void usage(const char *name)
int main(int argc, char *argv[])
{
+ struct intel_mmio_data mmio_data;
const char *path[REAL_MAX_SLICES] = {"l3_parity", "l3_parity_slice_1"};
int row = 0, bank = 0, sbank = 0;
int fd[REAL_MAX_SLICES] = {0}, ret, i;
@@ -189,7 +190,7 @@ int main(int argc, char *argv[])
if (intel_gen(devid) < 7 || IS_VALLEYVIEW(devid))
exit(77);
- assert(intel_register_access_init(intel_get_pci_device(), 0, device) == 0);
+ assert(intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, device) == 0);
dir = igt_sysfs_open(device);
@@ -217,7 +218,7 @@ int main(int argc, char *argv[])
* now. Just be aware of this if for some reason a hang is reported
* when using this tool.
*/
- dft = intel_register_read(0xb038);
+ dft = intel_register_read(&mmio_data, 0xb038);
while (1) {
int c, option_index = 0;
@@ -366,10 +367,10 @@ int main(int argc, char *argv[])
assert(i < 2);
dft |= i << 1; /* slice */
dft |= 1 << 0; /* enable */
- intel_register_write(0xb038, dft);
+ intel_register_write(&mmio_data, 0xb038, dft);
break;
case 'u':
- intel_register_write(0xb038, dft & ~(1<<0));
+ intel_register_write(&mmio_data ,0xb038, dft & ~(1<<0));
break;
case 'L':
break;
@@ -378,7 +379,7 @@ int main(int argc, char *argv[])
}
}
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
if (action == 'l')
exit(EXIT_SUCCESS);
diff --git a/tools/intel_lid.c b/tools/intel_lid.c
index 37c6ba5e..2a1d9800 100644
--- a/tools/intel_lid.c
+++ b/tools/intel_lid.c
@@ -117,9 +117,10 @@ out:
int main(int argc, char **argv)
{
+ struct intel_mmio_data mmio_data;
int swf14, acpi_lid;
- intel_mmio_use_pci_bar(intel_get_pci_device());
+ intel_mmio_use_pci_bar(&mmio_data, intel_get_pci_device());
while (1) {
swf14 = INREG(SWF14);
diff --git a/tools/intel_panel_fitter.c b/tools/intel_panel_fitter.c
index 137ef61a..64078705 100644
--- a/tools/intel_panel_fitter.c
+++ b/tools/intel_panel_fitter.c
@@ -273,6 +273,7 @@ int main (int argc, char *argv[])
bool do_disable = false, do_dump = false, do_usage = false;
struct pci_device *pci_dev;
uint32_t devid;
+ struct intel_mmio_data mmio_data;
printf("WARNING:\n"
"This tool is a workaround for people that don't have a Kernel "
@@ -280,7 +281,7 @@ int main (int argc, char *argv[])
"solution that may or may not work. Use it at your own risk.\n");
pci_dev = intel_get_pci_device();
- intel_register_access_init(pci_dev, 0, -1);
+ intel_register_access_init(&mmio_data, pci_dev, 0, -1);
devid = pci_dev->device_id;
if (!HAS_PCH_SPLIT(devid)) {
@@ -342,6 +343,6 @@ int main (int argc, char *argv[])
}
out:
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
return ret;
}
diff --git a/tools/intel_perf_counters.c b/tools/intel_perf_counters.c
index 50c4bce6..5824d9c1 100644
--- a/tools/intel_perf_counters.c
+++ b/tools/intel_perf_counters.c
@@ -441,6 +441,7 @@ gen7_get_counters(void)
int
main(int argc, char **argv)
{
+ struct intel_mmio_data mmio_data;
uint32_t devid;
int counter_format;
int counter_count;
@@ -483,10 +484,11 @@ main(int argc, char **argv)
if (oacontrol) {
/* Forcewake */
- intel_register_access_init(intel_get_pci_device(), 0, fd);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(),
+ 0, fd);
/* Enable performance counters */
- intel_register_write(OACONTROL,
+ intel_register_write(&mmio_data, OACONTROL,
counter_format << OACONTROL_COUNTER_SELECT_SHIFT |
PERFORMANCE_COUNTER_ENABLE);
}
@@ -520,10 +522,10 @@ main(int argc, char **argv)
if (oacontrol) {
/* Disable performance counters */
- intel_register_write(OACONTROL, 0);
+ intel_register_write(&mmio_data, OACONTROL, 0);
/* Forcewake */
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
}
free(totals);
diff --git a/tools/intel_reg.c b/tools/intel_reg.c
index e517956b..847fdbed 100644
--- a/tools/intel_reg.c
+++ b/tools/intel_reg.c
@@ -57,6 +57,7 @@ static inline int _not_supported(void)
struct config {
struct pci_device *pci_dev;
+ struct intel_mmio_data mmio_data;
char *mmiofile;
uint32_t devid;
@@ -387,7 +388,7 @@ static int read_register(struct config *config, struct reg *reg, uint32_t *valp)
reg->port_desc.name);
return -1;
}
- val = intel_iosf_sb_read(reg->port_desc.port, reg->addr);
+ val = intel_iosf_sb_read(&config->mmio_data, reg->port_desc.port, reg->addr);
break;
default:
fprintf(stderr, "port %d not supported\n", reg->port_desc.port);
@@ -458,7 +459,7 @@ static int write_register(struct config *config, struct reg *reg, uint32_t val)
reg->port_desc.name);
return -1;
}
- intel_iosf_sb_write(reg->port_desc.port, reg->addr, val);
+ intel_iosf_sb_write(&config->mmio_data, reg->port_desc.port, reg->addr, val);
break;
default:
fprintf(stderr, "port %d not supported\n", reg->port_desc.port);
@@ -552,9 +553,9 @@ static int intel_reg_read(struct config *config, int argc, char *argv[])
}
if (config->mmiofile)
- intel_mmio_use_dump_file(config->mmiofile);
+ intel_mmio_use_dump_file(&config->mmio_data, config->mmiofile);
else
- intel_register_access_init(config->pci_dev, 0, -1);
+ intel_register_access_init(&config->mmio_data, config->pci_dev, 0, -1);
for (i = 1; i < argc; i++) {
struct reg reg;
@@ -570,7 +571,7 @@ static int intel_reg_read(struct config *config, int argc, char *argv[])
}
}
- intel_register_access_fini();
+ intel_register_access_fini(&config->mmio_data);
return EXIT_SUCCESS;
}
@@ -584,7 +585,7 @@ static int intel_reg_write(struct config *config, int argc, char *argv[])
return EXIT_FAILURE;
}
- intel_register_access_init(config->pci_dev, 0, -1);
+ intel_register_access_init(&config->mmio_data, config->pci_dev, 0, -1);
for (i = 1; i < argc; i += 2) {
struct reg reg;
@@ -609,7 +610,7 @@ static int intel_reg_write(struct config *config, int argc, char *argv[])
write_register(config, &reg, val);
}
- intel_register_access_fini();
+ intel_register_access_fini(&config->mmio_data);
return EXIT_SUCCESS;
}
@@ -620,9 +621,9 @@ static int intel_reg_dump(struct config *config, int argc, char *argv[])
int i;
if (config->mmiofile)
- intel_mmio_use_dump_file(config->mmiofile);
+ intel_mmio_use_dump_file(&config->mmio_data, config->mmiofile);
else
- intel_register_access_init(config->pci_dev, 0, -1);
+ intel_register_access_init(&config->mmio_data, config->pci_dev, 0, -1);
for (i = 0; i < config->regcount; i++) {
reg = &config->regs[i];
@@ -634,7 +635,7 @@ static int intel_reg_dump(struct config *config, int argc, char *argv[])
dump_register(config, &config->regs[i]);
}
- intel_register_access_fini();
+ intel_register_access_fini(&config->mmio_data);
return EXIT_SUCCESS;
}
@@ -648,7 +649,7 @@ static int intel_reg_snapshot(struct config *config, int argc, char *argv[])
return EXIT_FAILURE;
}
- intel_mmio_use_pci_bar(config->pci_dev);
+ intel_mmio_use_pci_bar(&config->mmio_data, config->pci_dev);
/* XXX: error handling */
if (write(1, igt_global_mmio, config->pci_dev->regions[mmio_bar].size) == -1)
diff --git a/tools/intel_reg_checker.c b/tools/intel_reg_checker.c
index 6bde63ec..3f90de82 100644
--- a/tools/intel_reg_checker.c
+++ b/tools/intel_reg_checker.c
@@ -342,10 +342,11 @@ check_dpfc_control_sa(void)
int main(int argc, char** argv)
{
struct pci_device *dev;
+ struct intel_mmio_data mmio_data;
dev = intel_get_pci_device();
devid = dev->device_id;
- intel_mmio_use_pci_bar(dev);
+ intel_mmio_use_pci_bar(&mmio_data, dev);
if (IS_GEN7(devid))
gen = 7;
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index e71c3d9c..14d1ae0d 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -237,6 +237,7 @@ static const char *skl_nv12_buf_cfg_reg_name(int pipe, int plane)
static void skl_wm_dump(void)
{
+ struct intel_mmio_data mmio_data;
int pipe, plane, level;
int num_pipes = 3;
int max_planes = skl_max_planes(devid);
@@ -249,7 +250,7 @@ static void skl_wm_dump(void)
uint32_t plane_ctl[num_pipes][max_planes];
uint32_t wm_linetime[num_pipes];
- intel_register_access_init(intel_get_pci_device(), 0, -1);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
for (pipe = 0; pipe < num_pipes; pipe++) {
int num_planes = skl_num_planes(devid, pipe);
@@ -458,6 +459,7 @@ static void skl_wm_dump(void)
static void ilk_wm_dump(void)
{
+ struct intel_mmio_data mmio_data;
int i;
uint32_t dspcntr[3];
uint32_t spcntr[3];
@@ -469,7 +471,7 @@ static void ilk_wm_dump(void)
int num_pipes = intel_gen(devid) >= 7 ? 3 : 2;
struct ilk_wm wm = {};
- intel_register_access_init(intel_get_pci_device(), 0, -1);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
for (i = 0; i < num_pipes; i++) {
dspcntr[i] = read_reg(0x70180 + i * 0x1000);
@@ -505,7 +507,7 @@ static void ilk_wm_dump(void)
if (IS_BROADWELL(devid) || IS_HASWELL(devid))
wm_misc = read_reg(0x45260);
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
for (i = 0; i < num_pipes; i++)
printf(" WM_PIPE_%c = 0x%08x\n", pipe_name(i), wm_pipe[i]);
@@ -610,6 +612,7 @@ static void ilk_wm_dump(void)
static void vlv_wm_dump(void)
{
+ struct intel_mmio_data mmio_data;
int i;
unsigned int num_pipes = IS_CHERRYVIEW(devid) ? 3 : 2;
uint32_t dsparb, dsparb2, dsparb3;
@@ -619,7 +622,7 @@ static void vlv_wm_dump(void)
uint32_t dsp_ss_pm, ddr_setup2;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0, -1);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
dsparb = read_reg(0x70030);
dsparb2 = read_reg(0x70060);
@@ -650,13 +653,13 @@ static void vlv_wm_dump(void)
ddl3 = read_reg(0x70058);
- intel_punit_read(0x36, &dsp_ss_pm);
- intel_punit_read(0x139, &ddr_setup2);
+ intel_punit_read(&mmio_data, 0x36, &dsp_ss_pm);
+ intel_punit_read(&mmio_data, 0x139, &ddr_setup2);
} else {
fw7 = read_reg(0x7007c);
}
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
printf(" FW1 = 0x%08x\n", fw1);
printf(" FW2 = 0x%08x\n", fw2);
@@ -827,6 +830,7 @@ static void vlv_wm_dump(void)
static void g4x_wm_dump(void)
{
+ struct intel_mmio_data mmio_data;
int i;
uint32_t dspacntr, dspbcntr;
uint32_t dsparb;
@@ -835,7 +839,7 @@ static void g4x_wm_dump(void)
uint32_t mi_arb_state;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0, -1);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
dspacntr = read_reg(0x70180);
dspbcntr = read_reg(0x71180);
@@ -846,7 +850,7 @@ static void g4x_wm_dump(void)
mi_display_power_down = read_reg(0x20e0);
mi_arb_state = read_reg(0x20e4);
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
printf(" DSPACNTR = 0x%08x\n", dspacntr);
printf(" DSPBCNTR = 0x%08x\n", dspbcntr);
@@ -913,6 +917,7 @@ static void g4x_wm_dump(void)
static void gen4_wm_dump(void)
{
+ struct intel_mmio_data mmio_data;
int i;
int totalsize = IS_CRESTLINE(devid) ? 128 : 96;
uint32_t dsparb;
@@ -921,7 +926,7 @@ static void gen4_wm_dump(void)
uint32_t mi_arb_state;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0, -1);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
dsparb = read_reg(0x70030);
fw1 = read_reg(0x70034);
@@ -930,7 +935,7 @@ static void gen4_wm_dump(void)
mi_display_power_down = read_reg(0x20e0);
mi_arb_state = read_reg(0x20e4);
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
printf(" FW1 = 0x%08x\n", fw1);
printf(" FW2 = 0x%08x\n", fw2);
@@ -983,6 +988,7 @@ static void gen4_wm_dump(void)
static void pnv_wm_dump(void)
{
+ struct intel_mmio_data mmio_data;
int i;
int totalsize = 96; /* FIXME? */
uint32_t dsparb;
@@ -992,7 +998,7 @@ static void pnv_wm_dump(void)
uint32_t cbr;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0, -1);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
dsparb = read_reg(0x70030);
fw1 = read_reg(0x70034);
@@ -1002,7 +1008,7 @@ static void pnv_wm_dump(void)
mi_display_power_down = read_reg(0x20e0);
mi_arb_state = read_reg(0x20e4);
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
printf(" DSPARB = 0x%08x\n", dsparb);
printf(" FW1 = 0x%08x\n", fw1);
@@ -1073,6 +1079,7 @@ static void pnv_wm_dump(void)
static void gen3_wm_dump(void)
{
+ struct intel_mmio_data mmio_data;
int i;
int totalsize = IS_945GM(devid) ? 128 : 96; /* FIXME? */
uint32_t dsparb;
@@ -1082,7 +1089,7 @@ static void gen3_wm_dump(void)
uint32_t mi_arb_state;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0, -1);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
dsparb = read_reg(0x70030);
instpm = read_reg(0x20c0);
@@ -1090,7 +1097,7 @@ static void gen3_wm_dump(void)
fw_blc_self = read_reg(0x20e0);
mi_arb_state = read_reg(0x20e4);
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
printf(" DSPARB = 0x%08x\n", dsparb);
printf(" FW_BLC = 0x%016" PRIx64 "\n", fw_blc);
@@ -1142,6 +1149,7 @@ static void gen3_wm_dump(void)
static void gen2_wm_dump(void)
{
+ struct intel_mmio_data mmio_data;
int i;
int totalsize;
uint32_t dsparb;
@@ -1151,7 +1159,7 @@ static void gen2_wm_dump(void)
uint32_t mi_state;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0, -1);
+ intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
dsparb = read_reg(0x70030);
mem_mode = read_reg(0x20cc);
@@ -1159,7 +1167,7 @@ static void gen2_wm_dump(void)
fw_blc_self = read_reg(0x20e0);
mi_state = read_reg(0x20e4);
- intel_register_access_fini();
+ intel_register_access_fini(&mmio_data);
printf(" DSPARB = 0x%08x\n", dsparb);
printf(" MEM_MODE = 0x%08x\n", mem_mode);