summaryrefslogtreecommitdiff
path: root/lib
diff options
context:
space:
mode:
Diffstat (limited to 'lib')
-rw-r--r--lib/gpu_cmds.c4
-rw-r--r--lib/igt_draw.c8
-rw-r--r--lib/igt_fb.c4
-rw-r--r--lib/intel_aux_pgtable.c5
-rw-r--r--lib/intel_batchbuffer.c8
-rw-r--r--lib/intel_batchbuffer.h6
-rw-r--r--lib/rendercopy_gen4.c4
-rw-r--r--lib/rendercopy_gen6.c4
-rw-r--r--lib/rendercopy_gen7.c4
-rw-r--r--lib/rendercopy_gen8.c4
-rw-r--r--lib/rendercopy_gen9.c4
-rw-r--r--lib/rendercopy_i830.c8
-rw-r--r--lib/rendercopy_i915.c8
-rw-r--r--lib/veboxcopy_gen12.c6
14 files changed, 41 insertions, 36 deletions
diff --git a/lib/gpu_cmds.c b/lib/gpu_cmds.c
index 8d270ee8..79412725 100644
--- a/lib/gpu_cmds.c
+++ b/lib/gpu_cmds.c
@@ -119,7 +119,7 @@ gen7_fill_surface_state(struct intel_batchbuffer *batch,
ss->ss2.height = igt_buf_height(buf) - 1;
ss->ss2.width = igt_buf_width(buf) - 1;
- ss->ss3.pitch = buf->stride - 1;
+ ss->ss3.pitch = buf->surface[0].stride - 1;
ss->ss7.shader_chanel_select_r = 4;
ss->ss7.shader_chanel_select_g = 5;
@@ -422,7 +422,7 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch,
ss->ss2.height = igt_buf_height(buf) - 1;
ss->ss2.width = igt_buf_width(buf) - 1;
- ss->ss3.pitch = buf->stride - 1;
+ ss->ss3.pitch = buf->surface[0].stride - 1;
ss->ss7.shader_chanel_select_r = 4;
ss->ss7.shader_chanel_select_g = 5;
diff --git a/lib/igt_draw.c b/lib/igt_draw.c
index 7e0edec1..6950bc49 100644
--- a/lib/igt_draw.c
+++ b/lib/igt_draw.c
@@ -603,14 +603,14 @@ static void draw_rect_render(int fd, struct cmd_data *cmd_data,
igt_assert(dst);
src_buf.bo = src;
- src_buf.stride = tmp.stride;
+ src_buf.surface[0].stride = tmp.stride;
src_buf.tiling = I915_TILING_NONE;
- src_buf.size = tmp.size;
+ src_buf.surface[0].size = tmp.size;
src_buf.bpp = tmp.bpp;
dst_buf.bo = dst;
- dst_buf.stride = buf->stride;
+ dst_buf.surface[0].stride = buf->stride;
dst_buf.tiling = tiling;
- dst_buf.size = buf->size;
+ dst_buf.surface[0].size = buf->size;
dst_buf.bpp = buf->bpp;
batch = intel_batchbuffer_alloc(cmd_data->bufmgr, devid);
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 0e1b8493..cc0fb373 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -1977,9 +1977,9 @@ static void init_buf(struct fb_blit_upload *blit,
buf->bo = gem_handle_to_libdrm_bo(blit->bufmgr, blit->fd,
name, fb->gem_handle);
buf->tiling = igt_fb_mod_to_tiling(fb->modifier);
- buf->stride = fb->strides[0];
+ buf->surface[0].stride = fb->strides[0];
buf->bpp = fb->plane_bpp[0];
- buf->size = fb->size;
+ buf->surface[0].size = fb->size;
if (is_ccs_modifier(fb->modifier)) {
igt_assert_eq(fb->strides[0] & 127, 0);
diff --git a/lib/intel_aux_pgtable.c b/lib/intel_aux_pgtable.c
index dab83a9a..5addb2e2 100644
--- a/lib/intel_aux_pgtable.c
+++ b/lib/intel_aux_pgtable.c
@@ -77,7 +77,8 @@ pgt_table_count(int address_bits, const struct igt_buf **bufs, int buf_count)
/* Avoid double counting for overlapping aligned bufs. */
start = max(start, end);
- end = ALIGN(buf->bo->offset64 + buf->size, 1UL << address_bits);
+ end = ALIGN(buf->bo->offset64 + buf->surface[0].size,
+ 1UL << address_bits);
igt_assert(end >= start);
count += (end - start) >> address_bits;
@@ -255,7 +256,7 @@ pgt_populate_entries_for_buf(struct pgtable *pgt,
uint64_t top_table)
{
uint64_t surface_addr = buf->bo->offset64;
- uint64_t surface_end = surface_addr + buf->size;
+ uint64_t surface_end = surface_addr + buf->surface[0].size;
uint64_t aux_addr = buf->bo->offset64 + buf->ccs[0].offset;
uint64_t l1_flags = pgt_get_l1_flags(buf);
uint64_t lx_flags = pgt_get_lx_flags();
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 51aae4dc..3dc89024 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -512,7 +512,7 @@ intel_copy_bo(struct intel_batchbuffer *batch,
*/
unsigned igt_buf_width(const struct igt_buf *buf)
{
- return buf->stride/(buf->bpp / 8);
+ return buf->surface[0].stride/(buf->bpp / 8);
}
/**
@@ -526,7 +526,7 @@ unsigned igt_buf_width(const struct igt_buf *buf)
*/
unsigned igt_buf_height(const struct igt_buf *buf)
{
- return buf->size/buf->stride;
+ return buf->surface[0].size/buf->surface[0].stride;
}
/*
@@ -785,8 +785,8 @@ void igt_blitter_fast_copy(struct intel_batchbuffer *batch,
igt_assert(src->bpp == dst->bpp);
- src_pitch = fast_copy_pitch(src->stride, src->tiling);
- dst_pitch = fast_copy_pitch(dst->stride, src->tiling);
+ src_pitch = fast_copy_pitch(src->surface[0].stride, src->tiling);
+ dst_pitch = fast_copy_pitch(dst->surface[0].stride, src->tiling);
dword0 = fast_copy_dword0(src->tiling, dst->tiling);
dword1 = fast_copy_dword1(src->tiling, dst->tiling, dst->bpp);
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index 63d32188..69580839 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -232,12 +232,14 @@ enum i915_compression {
*/
struct igt_buf {
drm_intel_bo *bo;
- uint32_t stride;
uint32_t tiling;
enum i915_compression compression;
uint32_t bpp;
uint32_t *data;
- uint32_t size;
+ struct {
+ uint32_t stride;
+ uint32_t size;
+ } surface[2];
struct {
uint32_t offset;
uint32_t stride;
diff --git a/lib/rendercopy_gen4.c b/lib/rendercopy_gen4.c
index 42de77f9..d07b8e48 100644
--- a/lib/rendercopy_gen4.c
+++ b/lib/rendercopy_gen4.c
@@ -142,7 +142,7 @@ gen4_bind_buf(struct intel_batchbuffer *batch,
uint32_t write_domain, read_domain;
int ret;
- igt_assert_lte(buf->stride, 128*1024);
+ igt_assert_lte(buf->surface[0].stride, 128*1024);
igt_assert_lte(igt_buf_width(buf), 8192);
igt_assert_lte(igt_buf_height(buf), 8192);
@@ -176,7 +176,7 @@ gen4_bind_buf(struct intel_batchbuffer *batch,
ss->ss2.height = igt_buf_height(buf) - 1;
ss->ss2.width = igt_buf_width(buf) - 1;
- ss->ss3.pitch = buf->stride - 1;
+ ss->ss3.pitch = buf->surface[0].stride - 1;
ss->ss3.tiled_surface = buf->tiling != I915_TILING_NONE;
ss->ss3.tile_walk = buf->tiling == I915_TILING_Y;
diff --git a/lib/rendercopy_gen6.c b/lib/rendercopy_gen6.c
index 83c7d694..87034774 100644
--- a/lib/rendercopy_gen6.c
+++ b/lib/rendercopy_gen6.c
@@ -79,7 +79,7 @@ gen6_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf,
uint32_t write_domain, read_domain;
int ret;
- igt_assert_lte(buf->stride, 128*1024);
+ igt_assert_lte(buf->surface[0].stride, 128*1024);
igt_assert_lte(igt_buf_width(buf), 8192);
igt_assert_lte(igt_buf_height(buf), 8192);
@@ -113,7 +113,7 @@ gen6_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf,
ss->ss2.height = igt_buf_height(buf) - 1;
ss->ss2.width = igt_buf_width(buf) - 1;
- ss->ss3.pitch = buf->stride - 1;
+ ss->ss3.pitch = buf->surface[0].stride - 1;
ss->ss3.tiled_surface = buf->tiling != I915_TILING_NONE;
ss->ss3.tile_walk = buf->tiling == I915_TILING_Y;
diff --git a/lib/rendercopy_gen7.c b/lib/rendercopy_gen7.c
index a3c8b7f3..b88b75e9 100644
--- a/lib/rendercopy_gen7.c
+++ b/lib/rendercopy_gen7.c
@@ -65,7 +65,7 @@ gen7_bind_buf(struct intel_batchbuffer *batch,
uint32_t write_domain, read_domain;
int ret;
- igt_assert_lte(buf->stride, 256*1024);
+ igt_assert_lte(buf->surface[0].stride, 256*1024);
igt_assert_lte(igt_buf_width(buf), 16384);
igt_assert_lte(igt_buf_height(buf), 16384);
@@ -92,7 +92,7 @@ gen7_bind_buf(struct intel_batchbuffer *batch,
ss[1] = buf->bo->offset;
ss[2] = ((igt_buf_width(buf) - 1) << GEN7_SURFACE_WIDTH_SHIFT |
(igt_buf_height(buf) - 1) << GEN7_SURFACE_HEIGHT_SHIFT);
- ss[3] = (buf->stride - 1) << GEN7_SURFACE_PITCH_SHIFT;
+ ss[3] = (buf->surface[0].stride - 1) << GEN7_SURFACE_PITCH_SHIFT;
ss[4] = 0;
if (IS_VALLEYVIEW(batch->devid))
ss[5] = VLV_MOCS_L3 << 16;
diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
index e22d8501..8e02d846 100644
--- a/lib/rendercopy_gen8.c
+++ b/lib/rendercopy_gen8.c
@@ -151,7 +151,7 @@ gen8_bind_buf(struct intel_batchbuffer *batch,
uint32_t write_domain, read_domain, offset;
int ret;
- igt_assert_lte(buf->stride, 256*1024);
+ igt_assert_lte(buf->surface[0].stride, 256*1024);
igt_assert_lte(igt_buf_width(buf), 16384);
igt_assert_lte(igt_buf_height(buf), 16384);
@@ -199,7 +199,7 @@ gen8_bind_buf(struct intel_batchbuffer *batch,
ss->ss2.height = igt_buf_height(buf) - 1;
ss->ss2.width = igt_buf_width(buf) - 1;
- ss->ss3.pitch = buf->stride - 1;
+ ss->ss3.pitch = buf->surface[0].stride - 1;
ss->ss7.shader_chanel_select_r = 4;
ss->ss7.shader_chanel_select_g = 5;
diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
index 4d4541e3..835c8d80 100644
--- a/lib/rendercopy_gen9.c
+++ b/lib/rendercopy_gen9.c
@@ -199,7 +199,7 @@ gen8_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf,
uint32_t write_domain, read_domain, offset;
int ret;
- igt_assert_lte(buf->stride, 256*1024);
+ igt_assert_lte(buf->surface[0].stride, 256*1024);
igt_assert_lte(igt_buf_width(buf), 16384);
igt_assert_lte(igt_buf_height(buf), 16384);
@@ -250,7 +250,7 @@ gen8_bind_buf(struct intel_batchbuffer *batch, const struct igt_buf *buf,
ss->ss2.height = igt_buf_height(buf) - 1;
ss->ss2.width = igt_buf_width(buf) - 1;
- ss->ss3.pitch = buf->stride - 1;
+ ss->ss3.pitch = buf->surface[0].stride - 1;
ss->ss7.skl.shader_chanel_select_r = 4;
ss->ss7.skl.shader_chanel_select_g = 5;
diff --git a/lib/rendercopy_i830.c b/lib/rendercopy_i830.c
index e8c04718..ca815122 100644
--- a/lib/rendercopy_i830.c
+++ b/lib/rendercopy_i830.c
@@ -138,7 +138,7 @@ static void gen2_emit_target(struct intel_batchbuffer *batch,
uint32_t tiling;
uint32_t format;
- igt_assert_lte(dst->stride, 8192);
+ igt_assert_lte(dst->surface[0].stride, 8192);
igt_assert_lte(igt_buf_width(dst), 2048);
igt_assert_lte(igt_buf_height(dst), 2048);
@@ -156,7 +156,7 @@ static void gen2_emit_target(struct intel_batchbuffer *batch,
tiling |= BUF_3D_TILE_WALK_Y;
OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
- OUT_BATCH(BUF_3D_ID_COLOR_BACK | tiling | BUF_3D_PITCH(dst->stride));
+ OUT_BATCH(BUF_3D_ID_COLOR_BACK | tiling | BUF_3D_PITCH(dst->surface[0].stride));
OUT_RELOC(dst->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
@@ -179,7 +179,7 @@ static void gen2_emit_texture(struct intel_batchbuffer *batch,
uint32_t tiling;
uint32_t format;
- igt_assert_lte(src->stride, 8192);
+ igt_assert_lte(src->surface[0].stride, 8192);
igt_assert_lte(igt_buf_width(src), 2048);
igt_assert_lte(igt_buf_height(src), 2048);
@@ -201,7 +201,7 @@ static void gen2_emit_texture(struct intel_batchbuffer *batch,
OUT_BATCH((igt_buf_height(src) - 1) << TM0S1_HEIGHT_SHIFT |
(igt_buf_width(src) - 1) << TM0S1_WIDTH_SHIFT |
format | tiling);
- OUT_BATCH((src->stride / 4 - 1) << TM0S2_PITCH_SHIFT | TM0S2_MAP_2D);
+ OUT_BATCH((src->surface[0].stride / 4 - 1) << TM0S2_PITCH_SHIFT | TM0S2_MAP_2D);
OUT_BATCH(FILTER_NEAREST << TM0S3_MAG_FILTER_SHIFT |
FILTER_NEAREST << TM0S3_MIN_FILTER_SHIFT |
MIPFILTER_NONE << TM0S3_MIP_FILTER_SHIFT);
diff --git a/lib/rendercopy_i915.c b/lib/rendercopy_i915.c
index 1baa7a1b..56e1863e 100644
--- a/lib/rendercopy_i915.c
+++ b/lib/rendercopy_i915.c
@@ -88,7 +88,7 @@ void gen3_render_copyfunc(struct intel_batchbuffer *batch,
#define TEX_COUNT 1
uint32_t format_bits, tiling_bits = 0;
- igt_assert_lte(src->stride, 8192);
+ igt_assert_lte(src->surface[0].stride, 8192);
igt_assert_lte(igt_buf_width(src), 2048);
igt_assert_lte(igt_buf_height(src), 2048);
@@ -110,7 +110,7 @@ void gen3_render_copyfunc(struct intel_batchbuffer *batch,
OUT_BATCH(format_bits | tiling_bits |
(igt_buf_height(src) - 1) << MS3_HEIGHT_SHIFT |
(igt_buf_width(src) - 1) << MS3_WIDTH_SHIFT);
- OUT_BATCH((src->stride/4-1) << MS4_PITCH_SHIFT);
+ OUT_BATCH((src->surface[0].stride/4-1) << MS4_PITCH_SHIFT);
OUT_BATCH(_3DSTATE_SAMPLER_STATE | (3 * TEX_COUNT));
OUT_BATCH((1 << TEX_COUNT) - 1);
@@ -128,7 +128,7 @@ void gen3_render_copyfunc(struct intel_batchbuffer *batch,
uint32_t tiling_bits = 0;
uint32_t format_bits;
- igt_assert_lte(dst->stride, 8192);
+ igt_assert_lte(dst->surface[0].stride, 8192);
igt_assert_lte(igt_buf_width(dst), 2048);
igt_assert_lte(igt_buf_height(dst), 2048);
@@ -146,7 +146,7 @@ void gen3_render_copyfunc(struct intel_batchbuffer *batch,
OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
OUT_BATCH(BUF_3D_ID_COLOR_BACK | tiling_bits |
- BUF_3D_PITCH(dst->stride));
+ BUF_3D_PITCH(dst->surface[0].stride));
OUT_RELOC(dst->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
diff --git a/lib/veboxcopy_gen12.c b/lib/veboxcopy_gen12.c
index 87800941..2f017514 100644
--- a/lib/veboxcopy_gen12.c
+++ b/lib/veboxcopy_gen12.c
@@ -248,12 +248,14 @@ void gen12_vebox_copyfunc(struct intel_batchbuffer *batch,
/* TODO: add support for more formats */
igt_assert(src->bpp == 32);
emit_surface_state_cmd(batch, VEBOX_SURFACE_INPUT,
- width, height, src->bpp, src->stride,
+ width, height, src->bpp,
+ src->surface[0].stride,
src->tiling, R8G8B8A8_UNORM);
igt_assert(dst->bpp == 32);
emit_surface_state_cmd(batch, VEBOX_SURFACE_OUTPUT,
- width, height, dst->bpp, dst->stride,
+ width, height, dst->bpp,
+ dst->surface[0].stride,
dst->tiling, R8G8B8A8_UNORM);
emit_tiling_convert_cmd(batch,
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-29 09:55:03 +0000