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psr_active() checks the debugfs flag "HW Enabled & Active bit", which only
tells us if PSR was enabled by the driver. The state of PSR - active
or inactive is different from this flag for DDI platforms, so rename the
function appropriately.
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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And rename psr_drrs to no_drrs.
Makes the name consistent with other tests.
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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And rename the function to match what it does.
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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trigger_reset() imposes a tight time constraint (2s) so that we verify
that the reset itself completes quickly. In the middle of this check, we
call gem_quiescent_gpu() which may invoke an rcu_barrier() or two to
clear out the freed memory (DROP_FREED). Those barriers may have
unbounded latency pushing beyond the 2s timeout, so restrict the
operation to only wait-for-idle (DROP_ACTIVE).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105957
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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We already call x11_position() to calculate the position of the
overlay, so do not need to manually recompute them inside
x11_overlay_create(). This has the advantage that x11_position()
understands the multi-monitor layout instructions.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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If we trigger "too many" resets, the context and even the file, will be
banned and subsequent execbufs should fail with -EIO.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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Check that the kernel rejects a zero user_size.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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The timeout for PC8+ residency change is lowered to 30s. During testing
the entry always happened in ~10s, so thrice that should be a safe bet.
(active USB keyboard, network and screen, no powertop --auto-tune)
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Martin Peres <martin.peres@intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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On some devices BIOS limits possible Package C-states via setting one of
the MSRs. The test now skips if the limit is set to a shallower PC-state
than PC8.
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Martin Peres <martin.peres@intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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Make sure that at least one of the 'mmap' functions returns a valid pointer to
avoid dereferencing a NULL pointer later on. (Issue found via coverity)
v2:
- Use the version of the mapping function that will assert on fail
(Chris).
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
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These bits are useful for debug.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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Removed some trailing white spaces.
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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CS flips no longer exist, so the test has become useless.
Other tests like kms_busy already perform some testing
that's gpu agnostic.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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While trying to capture an aubdump on a libva demo, I run into a crash
in intel_batchbuffer.c. Turn out every driver has it's own
intel_batchbuffer.c with similar symbols and because aubdump pulls in
libigt, things go wrong.
One could argue that there is something wrong with
intel-vaapi-driver's build but I also think aubdump should embed as
little as possible.
This change creates a very small library that embeds just the needed
bits of igt for aubdump.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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It doesn't look like there should be a dependency there.
v2: s/intel_batchbuffer/intel_reg/
v3: One more s/intel_batchbuffer/intel_reg/ in benchmarks
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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In a few tests (like gem_exec_await, gem_exec_schedule) we use the GPU
hang to break a deadlock hit during test setup. In these case we would
like to see where in kernel the process is stuck (if at all).
References: https://bugs.freedesktop.org/show_bug.cgi?id=105900
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
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When waiting for a finite batch, all that we require is that the batch
completes. If it takes the full second (or longer) for us to wake up and
notice the completed batch is immaterial, so only assert that we don't
report an infinite timeout afterwards.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
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Execute the same batch on each engine and check that the composite fence
across all engines completes only after the batch is completed on every
engine.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Antonio Argenziano <antonio.argenziano@intel.com>
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Bspec: 11431
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Javier Villavicencio <javier.villavicencio@intel.com>
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v2 (made by Paulo): PCI IDs are now part of a previous patch, so we
can move the INTEL_ICL_11_IDs macro to this patch and avoid the
compilation warining on unused intel_icelake_info.
v3 (made by Paulo): fix the changelog (Antonio).
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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I just copied the Kernel file into the IGT repository.
New IDs:
- KBL GT2 sku from 672e314b21dc ("drm/i915/kbl: Add KBL GT2 sku")
- ICL IDs from d55cb4fa2cf0 ("drm/i915/icl: Add the ICL PCI IDs")
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
Reviewed-by: Jose Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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Our parent is RT, we are not. In theory, we should wait until our parent
has gone to sleep before we are allowed to proceed (we should both be
bound to the same cpu). Double down on this by sleeping in the child
until our parent has written a byte along a pipe().
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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Make the property validation more thorough:
- validate property flags
- make sure there's an expected number of values/enums
- make sure the possible values make sense
- make sure the current value makes sense
- actually iterate through all planes/crtc/connectors to
check their properties
- make sure encoders don't expose properties while at it
- check that atomic props aren't exposed to non-atomic clients
Still passes on my ivb. Not tested anything else so far.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
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This tries to align with the X.org communities's long-standing
tradition of trying to be an inclusive community and handing out
commit rights fairly freely.
We also tend to not revoke commit rights for people no longer
regularly active in a given project, as long as they're still part of
the larger community.
Finally make sure that commit rights, like anything happening on fd.o
infrastructre, is subject to the fd.o's Code of Conduct.
v2: Point at MAINTAINERS for contact info (Daniel S.)
v3:
- Make it clear that commit rights are voluntary and that committers
need to acknowledge positively when they're nominated by someone
else (Keith).
- Encourage committers to drop their commit rights when they're no
longer active, and make it clear they'll get readded (Keith).
- Add a line that maintainers and committers should actively nominate
new committers (me).
v4: Typo (Petri).
v5: Typo (Sean).
v6: Wording clarifications and spelling (Jani).
v7: Require an explicit commitment to the documented merge criteria
and rules, instead of just the implied one through the Code of Conduct
threat (Jani).
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Acked-by: Daniel Stone <daniel@fooishbar.org>
Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Gustavo Padovan <gustavo@padovan.org>
Acked-by: Petri Latvala <petri.latvala@intel.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Daniel Stone <daniel@fooishbar.org>
Cc: Dave Airlie <airlied@gmail.com>
Cc: Eric Anholt <eric@anholt.net>
Cc: Gustavo Padovan <gustavo@padovan.org>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Keith Packard <keithp@keithp.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Kristian H. Kristensen <hoegsberg@google.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Sean Paul <seanpaul@chromium.org>
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Batch functions were copy/pasted across several libs.
With moving it into intel_batchbuffer lib test can now be
easly maintained without worrying that we forgot to modify
older version of lib.
v2: Added documentation into lib and rebased patch
v3: Fixed typos and rebased patch
v4: Fixed documentation issues
v5: Rename, clean up of leftovers from previous version
and documentation polishing
v6: Fixing assert
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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structure
With a removal of all references to state variable there is
no longer any need to keep it in structure.
v5: Rebase
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
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This patch apply coding standard into rendercopy_gen7 library.
No functional changes were made.
v5: Fixed wrong indent
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
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This lib was written in a different manner than all other libs,
which was causing some issues during refactoring. Previous
implementation was using two pointers (ptr and state) to
access two parts of batchbuffer in the same time. Current
implementation is reusing ptr with a downside of needing
to ensure the state/command ordering is proper.
v3: Modified commit message and added batch boundary check
v5: Rebase
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
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This patch applies coding standard into gen6_render library.
No functional changes were made.
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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This patch is reordering registers and related shifts/fields
to be in one place and also is sorting registers definitions
in an ascending order by it memory address.
v4: Fixed missing values and corrected commit message
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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Remove duplicated registers, shifts and values from lib.
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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In the existing ABI, each engine operates its own timeline
(fence.context) and so should execute independently of any other. If we
install a blocker on all other engines, that should not affect execution
on the local engine.
v2: Move the requirements checks from the fixture to subtest so that
the test list is stable (Antonio)
v3: Protect SNB from the evil MI_STORE_DWORD.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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I have a cunning plan to make the vma open/close lazy to cache frequent
reallocations (as buffers are passed between applications, e.g. DRI).
However, this will mean that we will not be immediately closing vma and
so need to tell the kernel to process the idle handlers before checking
for leaks.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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The amdgpu tests in tests/amdgpu got installed directly into
$libexecdir before, but test-list.txt still referred to them as
amdgpu/$testname.
This fixes running scripts/run-tests.sh -l with the install directory
as IGT_TEST_ROOT and, I can imagine, actually running them from
install directory (untested). It also removes one FIXME comment for an
internet point.
Signed-off-by: Petri Latvala <petri.latvala@intel.com>
Cc: Tomi Sarvela <tomi.p.sarvela@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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It makes sense to fetch the min and max timestamp only after the
last sort of the array.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: John Harrison <John.C.Harrison@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
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Just to clear up some space for incoming code refactoring.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: John Harrison <John.C.Harrison@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
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Media fill function can be reused on Gen10. Code has not
changed. Let's reuse gen9.
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
Reviewed-by: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Reviewed-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
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Delay the auto-generation of end/notify values until the point where
everything is known. As opposed to potentially generating them
multiple times with differing values (in the case of 'incomplete'
entries).
v2: More complete description. [Tvrtko]
Signed-off-by: John Harrison <John.C.Harrison@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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There are various statistics being calculated multiple times in
multiple places while the log file is being read in. Some of these are
then re-calculated when the database is munged to correct various
issues with the logs. This patch consolidates the calculations into a
separate pass after all the reading and munging has been done.
Note that this actually produces a different final output as the
'execute-delay' values were not previously being re-calculated after
all the fixups. Thus were based on an incorrect calculation.
v2: Reduce scope of some local variables [Tvrtko]
Signed-off-by: John Harrison <John.C.Harrison@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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Add an extra level to the databse key sort so that the ordering is
deterministic. If the time stamp matches, it now compares the key
itself as well (context/seqno). This makes it much easier to determine
if a change has actually broken anything. Previously back to back runs
with no changes could still produce different output, especially when
adding extra debug output during the calculations.
As the comparison test is now more than a single equation, moved it
out into a separate sort function.
v2: Re-work sort func for readability/performance [Tvrtko]
Signed-off-by: John Harrison <John.C.Harrison@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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Cache the key count value rather than querying the hash every time.
Also assert that the database does not magically change size after the
fixups.
v2: Rename variable according to style guide [Tvrtko]
v3: Reverted accidental style change and added a blank line. [Tvrtko]
Signed-off-by: John Harrison <John.C.Harrison@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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i915 renamed the request related tracepoints so catch up with that.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> # irc
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In investigating the issue with having to force preemption within the
executing ELSP[], we want to trigger preemption between all elements of
that array. To that end, we issue a series of requests with different
priorities to fill the in-flight ELSP[] and then demand preemption into
the middle of that series. One can think of even more complicated
reordering requirements of ELSP[], trying to switch between every
possible combination of permutations. Rather than check all 2 billion
combinations, be content with a few.
v2: Add a different pattern for queued requests. Not only do we need to
inject a request into the middle of a single context with a queue of
different priority contexts, but we also want a queue of different
contexts, as they have different patterns of ELSP[] behaviour.
v3: Fixup the naming clash from copy'n'pasting
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
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Before we start trying to use userptr to test interoperability with
PRIME, we first need to check that the device in question has userptr
support.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106013
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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Depending on the default mode size, some tests will fail because it
will exceed the maximum size that hardware tracking can handle,
mostly because hardware tracking do not take in care the X and Y
offsets, so the plane size + offsets needs be smaller or equal to
hardware tracking limmits.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105680
Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
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This makes life easier for users behind network proxies. A simple
'export https_proxy=<proxy url>' will make this works, today user
needs to do a more complicated setup in ssh/git with proxy
information.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
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Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Acked-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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Masking assumes a direct relationship between the software LUT
structure, and hardware LUT. This is not always the case.
On AMD hardware for example, the hardware LUT is composed of
piecewise-linear segments, with end-point spaced exponentially along the
X axis, while software LUT is spaced linearly. Masking the LUT for the
purpose of truncating the resulting colors won't work here.
v2: Add commit message and sign off.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Acked-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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Fill entire frame to avoid garbage data from being included in CRC
calculations.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Acked-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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