Age | Commit message (Collapse) | Author |
|
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Unfortunately this requires slab poisoning to catch anything :(
Also add a new helper to drmtest to get the available fence count.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
|
|
This thing takes ages on older chips.
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Meh, I suck.
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Meh, I've forgotten these.
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Oops, the new checks need correctly tiled blts to work.
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
... it checks much more now.
Also update the comments a bit in the testcase.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Now with more tiling transition tests. Changes:
- refactoring to reuse the tiling transition functions.
- add a tiled->untiled transition
- add a tiled->tiled transition with different stride
- add a check at the end to ensure that the tiling has indeed changed
on the test_bo
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
This is a command-line tool that allows us to display and modify the
InfoFrames we send.
v2: use argv instead of stdin
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Fixes spurious failures.
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Although the address space for GTT mappings may only be 32-bits, we need
to use the explicit 64-bit mmap interface so that on a 32-bit platform
the offset we pass is not truncated to 31-bits.
Fixes gem_mmap_offset_exhaustion on 32-bit platforms.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
|
|
Same test as Chris Wilson's gem_cpu_concurrent_blit, but for
gtt mmaps.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
|
|
That way I can run i-g-t on my ivb without spurious failures.
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
This is meant to test the sysfs entry for showing rc6 residency in
milliseconds. Remember, sysfs is a permanent interface.
v2: use new get_card interface to try "all" devices
check rc6p and rc6pp in addition to rc6
v3: rename rc6_residency.c to sysfs_rc6_residency.c
print better error messages
skip test if rc6 isn't enabled
v4: update to new sysfs names
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
|
|
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
|
|
So that we don't cause needless thrashing on older devices and spoil the
test.
|
|
Designed to exercise this patch to i915.ko:
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index fbf1118..57ae1f2 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3181,9 +3181,11 @@ i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_obj
if (ret)
return ret;
- ret = i915_gem_object_wait_rendering(obj);
- if (ret)
- return ret;
+ if (write || obj->pending_gpu_write) {
+ ret = i915_gem_object_wait_rendering(obj);
+ if (ret)
+ return ret;
+ }
i915_gem_object_flush_gtt_write_domain(obj);
By exercising the conditions whereby should either of the checks be missed
an error is detected.
|
|
We use bashisms, which debian's default sh dash doesn't like.
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Used to check that i915_error_state works. Unfortunately this
kills the gpu because wedging is permanent.
Base on a patch by Ben Widawsky.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Oops. Originally by me, noticed while reviewing Ben Widawsky's patch.
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
This removes cut and pasted code and uses a more central source.
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Currently all we see is gem_read: ret == 0 failed, where it would help
to see the errno and/or the ret.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
|
|
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
MI_MEM_VIRTUAL actually means use global gtt now, not setting the bit
means use ppgtt. On previous gens, not setting the bits ment 'use
physical memory'. So what, the usual confusion.
Note that for some odd reasong this is broken on gen6, but only on the
bsd ring. Unexpected.
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
... but actually run the test with reduced memory requirements,
as the messages claims. Additional print it to stdout, stderr
seems to imply FAIL in our QA's testing rig.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
This also adds a gem_madvise helper to lib/drmtest.c
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
|
|
/me just hates fluff
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Can we just please stop this?
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Fixes intel_gpu_top on gen3 which otherwise refuses to do mmio.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
|
|
A cut'n'paste error from gen2 apparently.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
|
|
Without enabling largefile support the prototype for mmap64() is broken
on Linux/x86_64 with the result being a 32-bit integer sign-extended
to fill a 64-bit pointer. Hilarity ensues.
|
|
This allows to specify '-d' parameter which will decode individual bits in
each register being read.
The register bits are printed horizontally for space reasons. This
requires more than 80x25 terminal to see them all. An alternative solution
would be to print them vertically, but this will become much more
difficult to read when printing multiple registers at the same time.
v2: fix spacing to get us a bit closer to the code nirvana.
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
|
|
The registers must be passed on the command line and will be read
sequentially, one at a time.
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
|
|
This will allow us to pass more options to it in the future.
v2: fix whitespacing issues and improve scary warning text as suggested by
Paul Menzel.
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
|
|
... 8 pages is just not enough to somewhat reliably get one page that
needs bit17 swizzling.
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
Astonishing how dense I sometimes am ...
- increase the bo size so that we don't have any round-up to next tile
size areas (which the 2d blit go over, but the 1d pread/pwrite calls
will notice).
- correctly set tiling bits when copying back to a linear buffer.
- read back through a tiled bo to avoid messing with swizzling.
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|
|
And indeed, this blows up.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
|