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Use another sensitive CPU reloc to emit a chained batch from inside the
updated buffer to reduce the workload on slow machines to fit within the
CI timeout.
References: https://bugs.freedesktop.org/show_bug.cgi?id=108248
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
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Some setups (e.g. guc and gen10+) can not disable the MI_USER_INTERRUPT
generation and so can not simulate missed interrupts. These tests would
fail, so skip when the kernel reports no tests available.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
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Use a specific timeout to exercise the race conditions, rather than a
number of tries -- this prevents it burning up too many minutes under CI
for little gain, we can just run it again to improve race detection.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108667
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
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Previous implementation of __gem_mmap__cpu and __gem_mmap_wc only
differ with setting proper flag for caching. This patch implement
__gem_mmap, which merge those two functions into one
v2: Reordered and splited this patch into two separete patches
v3: Dropped unnecessary check
v4: Remerge patches again and fixed __gem_mmap description
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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We had some duplicates in code that are using direct call to
__gem_mmap__cpu or __gem_mmap__wc and then assert it result, which is what
gem_mmap__cpu and gem_mmap__wc is taking care for us.
v2: Rebased and reordered this patch in series
v4: Rebase
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
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In lib code there were few functions using param number instead of
defines. We would like to use defines, since they are providing more
information to user comparing to param number.
v2: Rebased patch
v4: Fixed commit message
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
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We multiply the memfd 64k to create a 2G arena which we then attempt to
write into after marking read-only. However, when it comes to unlock the
arena after the test, performance tanks as the kernel tries to resolve
the 64k repeated mappings onto the same set of pages. (Must not be a
very common operation!) We can get away with just mlocking the backing
store to prevent its eviction, which should prevent the arena mapping
from being freed as well.
References: https://bugs.freedesktop.org/show_bug.cgi?id=108887
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
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Th heavy variant of gem_ctx_switch does little more than provide an
alternate timing for the basic gem_ctx_switch; the timing only effects
the HW and does not stress the driver any differently. As such,
including gem_ctx_switch/heavy provides no more basic coverage for BAT
over and above the default gem_ctx_switch and
i915_selftests/live_contexts.
It takes around 45s, of a 600s total target time for BAT.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Acked-by: Tomi Sarvela <tomi.p.sarvela@intel.com>
Acked-by: Petri Latvala <petri.latvala@intel.com>
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The same code checking if sink supports PSR was spread into 3 tests,
better move it to lib and reuse.
v2: splitted previous patch into this one and the next one(Dhinakaran)
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
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So every function reading i915_edp_psr_status can allocate a buffer
long enough.
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
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If we break out of the test loop early, we may not have filled all
dwords, so be careful to only check as far as we completed.
Fixes: d9cd03c887a5 ("i915/gem_exec_whisper: Limit to a maximum of 150s")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109356
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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Add missing parenthesis in the macro coding the vertical pulse high
bits. Without them, the shift takes precedence over the logical and
operation, which is not how these bits should be coded according to
the spec.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Just use the normal library function, with the normal warning message
for an unmatched GPU so that CI buglog can filter it.
References: https://bugs.freedesktop.org/show_bug.cgi?id=109315
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Martin Peres <martin.peres@free.fr>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
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The force option allows users to specify which driver they want that IGT
uses. Nonetheless, if the user has two or more loaded drivers in his
system, the force option will not work as expected because IGT will take
the first driver found at /dev/dri. This problem can be reproduced in a
QEMU VM that using Bochs and VKMS. This patch handles this scenario by
ensuring that IGT uses the forced module specified via IGT_FORCE_DRIVER.
Signed-off-by: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
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Fixes: 738f43a54d62 ("tests/amdgpu: Add test for Adaptive Backlight Management")
Reported-by: gitlab-CI
Signed-off-by: Petri Latvala <petri.latvala@intel.com>
Cc: David Francis <David.Francis@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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Each individual pass is as effective at spotting an error using the
Chinese whisper as any other, so the effectiveness of adding more passes
rapidly diminishes. To keep the tests bounded within time, limit a
subtest to a mere 150s!
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108592
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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The rabbit hole goes deep in this case, but I couldn't find any place
where we'd still rely on -1 for Intel. Drop the remaining support to
prevent anyone adding new code using this.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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Add test to check extreme alpha values i.e. fully opaque and fully transparent
for cursor plane and verify by calculating hardware and software CRC.
Signed-off-by: Mamta Shukla <mamtashukla555@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
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This patch adds a basic kms test to validate the display stream
compression functionality if supported on DP/eDP connector.
Currently this has only two subtests to force the DSC on all
the eDP and DP connectors that support it with default parameters.
This will be expanded to add more subtests to tweak DSC parameters.
v8 (from Manasi):
* Fix the logic to scan through all connectors even if some dont
support DSC/FEC (Petri)
* Fix the skip test logic if no connectors support DSC to avoid
false positives (Petri)
* Move test clenup to run_test
v7: (from Anusha)
* Code Style changes.(Petri)
* Use for_each_pipe() instead of for_each_pipe_static().(Petri)
* Correct logic by avoiding skipping of inner for loop completely.(Petri)
v6: (from Anusha)
* Fix run_test() (Petri)
* Fix update_display() to avoid leaks. (Petri)
v5:
* Fix test cleanup to avoid crash (Petri)
v4:
* Future proof for more test types (Petri)
* Fix alphabetical order (Petri)
* s/igt_display_init/igt_display_require (Petri)
* Remove blank lines after return (Petri)
v3:
* Use array of connectors and loop through (Petri)
* Also check for FEC on DP connectors (Manasi)
* Add a Pipe_A restriction on DP (Ville)
v2:
* Use IGT wrappers for all (DK, Antonio)
* Split into two subtests for eDP and DP types (Petri)
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
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get_tiling == gem_get_tiling + igt_require; so do that instead of
opencoding the ioctl.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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If we do not know the underlying swizzle on the HW, we do not know the
full tiling pattern and cannot predict the expected results. This is
often because the swizzle varies between pages and is not as constant as
we naively expected.
v2: gem_get_tiling() does the physical==reported check, we just need to
add a require
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
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Currently blt-vs-render runs for a fixed loop count, and exceeds 360s
on a slow Skylake-y. It really doesn't tell us anything useful about low
likelihood events after the first few seconds it takes to fill memory,
so limit it to 30s (and hope that repeated runs in CI is enough to
exercise the even rarer corner cases).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108039
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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sysfs doesn't give the driver an open() callback, so we can only report
the unavailability of HW on the first read; so check read() after checking
open().
Fixes: 93f0ad4b835e ("i915/hangman: Skip if disabled by the kernel")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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These exercise a certain HW misfeature, no longer protected by the
kernel cmdparser due to obsolete userspace requirements.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Acked-by: Petri Latvala <petri.latvala at intel.com>
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On Skylake, BB_OFFSET seems to be unstable. Since this is an
offset into the batch at the time of CS execution, it should be actively
written to as we read from the register so allow it a qword of
discrepancy (since the CS should be reading in qwords). This still
allows us to detect dirt across the rest of the register field, should
that be required.
v2: restrict ignore_bits to only BIT(2) that we see fluctuate in testing
(Antonio)
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Antonio Argenziano <antonio.argenziano@intel.com>
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Some kernels may have to disable error capture for some hardware or by
it being configured out. Since it is conditionally available, asserting
it exists is not an actual requirement. For hardware where we are unable
to provide error state capture, skip.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
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Commit e27626898b87 ("igt: Check the physical swizzle status") stopped
trying to chase the parameters from the device sysfs, entirely by
accident. Make it a tiny bit more robust by forgiving the sysfs device
not being present and jumping to the /sys/module + driver name param
lookup fallback.
Reported-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
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A typo fix in 1x2 pixel block conversion code, revealed by GCC 9
Fixes: 1c7ef3890045 ("lib: Use igt_matrix for ycbcr<->rgb conversion")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109257
Reported-by: Martin Liska <mliska@suse.cz>
Signed-off-by: Petri Latvala <petri.latvala@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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Adaptive Backlight Management (ABM) is a power-saving
feature on AMD ASICs that reduces backlight while increasing
pixel contrast and luminance. This test confirms that
ABM is present and enabled, and that backlight performance
is sane. It uses AMD-specific debugfs entries to
read the backlight PWM values.
It has 5 subtests:
dpms_cycle
Sets brightness to half, then confirms that value is restored
after dpms off and then on.
backlight_monotonic_basic
Sets brightness to ten different values, confirming that
higher brightness values are brighter.
backlight_monotonic_abm
Same as backlight_monotonic_basic, but with abm enabled.
abm_enabled
Sets abm to its four intensity levels, confirming that
abm reduces the backlight, and the reduction is greater
for higher abm level.
abm_gradual
Sets abm to off and then maximum intensity, confirming
that brightness decreases continually over the first
second and eventually reaches the target value.
This test takes 30s to run.
v2: make sure that dpms is cycled on the eDP display
Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
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The i915 specific feature requirements that would have failed subtests
from kms_plane, kms_plane_multiple and kms_plane_scaling have been
conditionally guarded against. These tests can now be run on AMDGPU
with the i915 specific tests skipped appropriately.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
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The kms_plane_lowres subtests will fail on non-i915 hardware because
of the devid lookups and tiling format requirements.
This patch makes use of the igt_display_has_format_mod() helper to
check for support before failing fb creation.
The tests still won't fully run yet on i915 hardware because they'll
skip during calls to igt_assert_plane_visible - those require an i915
extension to get the CRTC/plane set for a given pipe.
v2: Use igt_display_has_format_mod helper (Ville)
v3: Move variable declarations to loop scope (Ville)
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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The per-pipe plane position subtests are capable of running on
AMDGPU as long as they're not using i915 specific tiling formats.
The test setup already supports being invoked with different tiling
modes so this patch introduces the new 'tiled-none' subtest that runs
without any tiling.
The tiled-none tests are skipped on i915 to retain existing test
coverage and behavior on i915.
v2: Use igt_display_has_format_mod helpers (Ville)
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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The plane_scaling subtests are capable of running on AMDGPU when
not using i915 specific tiling formats and when the test only requires
one scaler per pipe.
This patch removes the forced i915 devid and gen checks from non i915
devices. It also adds logic for getting the number of scalers per pipe
in a way that doesn't only depend on devid. One scaler per pipe is
assumed for AMDGPU.
There isn't any specific reason that the x-tiled formats need to be
used on the non-rotation tests on i915 but this patch keeps the
existing test behavior. It's a little simpler to keep it this way for
the prepare_crtc helper that's shared between the scaling test
and the clipping/clamping test.
v2: Use igt_plane_has_format_mod helper (Ville)
v3: Use helpers to check x-tiled support (Ville)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Ensure that the hangcheck notices the hanging batch by using a
non-preemptible spin batch, as some future versions of hangcheck may
allow a preemptible GPU hog to survive.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
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Pixman requires buffer strides the be aligned to 32-bit words in order
to create internal representations of buffers. If this condition is not
met, it will fail and IGT will not be able to report the error cause,
making it hard to debug the issue.
Add an explicit check in our code prior to calling pixman when
converting buffer so that the error can be understood if it occurs.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Add debug prints for the reference and captured CRCs when comparing them
and dumping them, which can be useful to get an idea of what is going on
(e.g. specific noise on display cables often only changes one of the
values that compose the CRC).
It's also useful to associate a test debug output with the dumped
pictures (that have the CRC in their name).
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
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This adds a new block size argument to the pattern generation helpers so
that different sizes of blocks can be used.
In the future, this allows us to use different block sizes when testing
overlay planes, making it visually explicit what is part of the main
plane and what is part of the overlay plane.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
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In order to reuse the pattern generation helper for overlay planes,
let's provide the pattern generation helper with the explicit dimensions
instead of the mode (that only applies to the primary plane).
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
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Using the width from the selected mode is not sufficient to correctly
paint a pattern on the framebuffer memory: the stride also has to be
taken in account for proper line start alignment.
Pass the stride and use it in chamelium_paint_xr24_pattern.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Maxime Ripard <maxime.ripard@bootlin.com>
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The xr24 pattern for chamelium testing appears mangled when checking it
on an actual display. This is because the horizontal and vertical
display sizes are inverted when used as width and height.
Put them back in order.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Maxime Ripard <maxime.ripard@bootlin.com>
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The documentation block was copypasted from for_each_pipe without
changing the name.
A drive-by typo fix to for_each_pipe's docs is included.
Signed-off-by: Petri Latvala <petri.latvala@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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../lib/igt_fb.c: In function ‘convert_rgb24_to_yuv444’:
../lib/igt_fb.c:1720:16: warning: unused variable ‘v’ [-Wunused-variable]
float y, u, v;
^
../lib/igt_fb.c:1720:13: warning: unused variable ‘u’ [-Wunused-variable]
float y, u, v;
^
../lib/igt_fb.c:1720:10: warning: unused variable ‘y’ [-Wunused-variable]
float y, u, v;
^
Signed-off-by: Petri Latvala <petri.latvala@intel.com>
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
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When possible, all tests we know we were going to attempt to execute
now appear in the results as "notrun". The only known case where it's
not possible to add an explicit "notrun" is when running in
multiple-mode, because "no subtests" and "run all subtests, we didn't
list them beforehand" are represented the same.
v2: Rebase and adjust to already landed json changes
Signed-off-by: Petri Latvala <petri.latvala@intel.com>
Cc: Martin Peres <martin.peres@linux.intel.com>
Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Acked-by: Martin Peres <martin.peres@linux.intel.com>
Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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This commit adds a new option for forcing the use of a specific driver
indicated via an environment variable.
v2 (Petri):
- Use an environment variable instead of command line
- Refactor the loop in __open_device
- Don't try to load kernel modules
v3 (Petri):
- Rebase and adjust to the driver loading changes
Signed-off-by: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com>
Signed-off-by: Petri Latvala <petri.latvala@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Cc: gustavo@padovan.org
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com>
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XYUV8888 format support has been added to DRM, modified
IGT to reflect those changes.
v2: Fixed merge conflict, started to use new yuv<=>rgb
conversion functions.
v3: Fixed kms_available_modes_crc test to support new XYUV
format. Fixed a problem, where test complains that two
outputs might use same pipe at the same time.
v4: Fixed convertion procedure in igt_fb to support XYUV
properly.
v5: Fixed a coding typo.
v6: Set depth equal to -1 for XYUV format in order to prevent
it to be used by igt_bpp_depth_to_drm_format, as we do not
want YUV formats to be used in that case.
v7: Fix "black" color initialization for create_bo_for_fb with
proper value. Changed naming "planar_stride" to "xyuv_stride".
v8: Change naming from DRM_FORMAT_XYUV to DRM_FORMAT_XYUV8888
v9: Fixed compilation errors by rebasing to recent master.
v10: Adding reference to correspondent kernel commit with the new format
in include/drm-uapi
v11: Removed unnecessary sizeof's in rgb <=> yuv444 convert functions.
v12: Rebased against master branch, fixed rebase conflict caused by
new fb_convert functions. Removed drm kernel commit reference
as it is still not merged, so doesn't make sense to use it.
v13: Resolved one more rebase conflict.
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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amdgpu has started to report out of space after creating a few contexts.
This is not the scope of this test as here we are just verifying that
fences created in amd can be imported and used for synchronisation by
i915 and for that we just need at least one context created!
References: https://bugs.freedesktop.org/show_bug.cgi?id=109049
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Antonio Argenziano <antonio.argenziano@intel.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
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assertions, v2.
Typically PSR enables in around 136 ms, but on some tests the we have
to explicitly make sure that the gpu is idle before rendering.
Otherwise, sometimes we wait for the background flusher to finish,
which will take at least a second longer, and causes the wait for
PSR to timeout.
On kms_frontbuffer_tracking:
Starting subtest: psr-2p-scndscrn-shrfb-plflip-blt
psr_active(debugfs_fd, true) took 136ms
psr_active(debugfs_fd, true) took 136ms
psr_active(debugfs_fd, true) took 350ms
psr_active(debugfs_fd, true) took 136ms
psr_active(debugfs_fd, true) took 1598ms
Changes since v1:
- Do not call gem_quiescent_gpu on modesetfrombusy subtest, or we get
a timeout.
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108733
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> #v1
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Those 2 tests fail regularly on HSW, probably because the OA period
aligns slightly differently there because of the differnce in the
timestamp frequency between HSW and other generation. Just bump the
max number by 1 to fix the issue.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102252
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
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It's a huge kludge (doesn't track dependencies correctly) and compared
to the meson one, real slow. Throw it out.
Acked-by: Petri Latvala <petri.latvala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
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Also simplify the instructions for meson 0.47+, where we track
dependencies correctly.
v2: Fix typo (Petri)
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
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