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path: root/assembler/brw_structs.h
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2013-03-04assembler: Don't use GL typesDamien Lespiau
sed -i -e 's/GLuint/unsigned/g' -e 's/GLint/int/g' \ -e 's/GLfloat/float/g' -e 's/GLubyte/uint8_t/g' \ -e 's/GLshort/int16_t/g' assembler/*.[ch] Drop the GL types here, they don't bring anything to the table. For instance, GLuint has no guarantee to be 32 bits, so it does not make too much sense to use it in structure describing hardware tables and opcodes. Of course, some bikeshedding can be applied to use uin32_t instead, I figured that some of the GLuint are used without size constraints, so a sed with uint32_t did not seem the right thing to do. On top of that initial sed, one bothered enough could change the structures with size constraints to actually use uint32_t. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04assembler: Don't pollute the library files with gen4asm.hDamien Lespiau
gen4asm.h is assembler specific while we want the library files to be somewhat of a proper library. This means that we have to redefine the GL* typedefs for brw_structs.h, not using any of thet GL typedef will be for a future commit. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04assembler: Don't change the size of opcodes!Damien Lespiau
Until now, the assembler had relocation-related fields added to struct brw_instruction. This changes the size of the structure and break code assuming the opcode structure is really 16 bytes, for instance the emission code in brw_eu_emit.c. With this commit, we build on the infrastructure that slowly emerged in the few previous commits to add a relocatable instruction with the needed fields. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04assembler: Remove trailing white spaces from brw_structs.hDamien Lespiau
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04assembler: Adopt brw_structs.h from mesaDamien Lespiau
Finally merge both brw_structs.h from mesa. One detail has risen in that last commit, the msg_control field of data port message descriptors. Mesa's msg_control field is sometimes split with messages-specific fields where the assembler (at least for recent generations) exposes the full msg_control value in the send instruction. As libva's shaders encodes the full msg_control value in its send instructions, I've chosen to not take the split msg_control from mesa. It's absolutely possible to have a patch fixing that divergence at some later point. I've also kept a hack introduced with ironlake to not have to rewrite shaders (that encode msg_control in the text, remember), and thus creates a another difference with Mesa. - GLuint msg_control:3; - GLuint msg_type:3; + GLuint msg_control:4; + GLuint msg_type:2; Once again, I've made sure that re-generating libva's shaders don't show any difference. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04assembler: Rename bits3.id and bits3.fdDamien Lespiau
As always, to sync with mesa. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04assembler: Rename branch_2_offset to break_contDamien Lespiau
Once again, import the equivalent struct from mesa. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04assembler: Rename branch to branch_gen6Damien Lespiau
The purpose of this commit is to synchronize opcode definitions across the gen4asm assembler and mesa. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04assembler: Rename gen5 DP pixel_scoreboard_clear to last_render_targetDamien Lespiau
The purpose of this commit is to synchronize opcode definitions across the gen4asm assembler and mesa. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04assembler: Remove struct dp_write_gen6 and struct use gen6_dpDamien Lespiau
We ended up with 2 structures that where exactly the same, so just use one, which happens to be the one Mesa has. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04assembler: Rename dp_gen7 to gen7_dp and sync it with Mesa'sDamien Lespiau
The purpose of this commit is to synchronize opcode definitions across the gen4asm assembler and mesa. I had to drop how mesa splits msg_control as the current assembly language gives access the the whole msg_control field. Recompiling the xorg and the intel driver of libva shaders doesn't show any difference in the assembly created. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04assembler: Rename dp_gen6 to gen6_dp and sync with Mesa'sDamien Lespiau
The purpose of this commit is to synchronize opcode definitions across the gen4asm assembler and mesa. I had to drop how mesa splits msg_control as the current assembly language gives access the the whole msg_control field. Recompiling the xorg and the intel driver of libva shaders doesn't show any difference in the assembly created. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04assembler: Rename dp_read_gen6 to gen6_dp_sampler_const_cacheDamien Lespiau
The purpose of this commit is to synchronize opcode definitions across the gen4asm assembler and mesa. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04assembler: Rename three_src_gen6 to da3srcDamien Lespiau
Mesa's brw_structs.h has named/renamed this field to da3src. Sync with them. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04assembler: Sync brw_instruction's header with mesa'sDamien Lespiau
Two changes there, a field has been renamed and one bit of padding is now used for compressed instructions. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04build: Integrate the merged gen assembler in the build systemDamien Lespiau
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-03-04Add autotools build system, and rearrange directory layout.Eric Anholt
2013-03-04Get the wm program to parse.Eric Anholt
2013-03-04Initial gen4asm code.Eric Anholt