| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2013-11-06 | assembler/bdw: Add the support of align1 register-indirect addressing mode ↵ | Zhao Yakui | |
| on Gen8 Otherwise it can't compile the following GPU shader that uses the register-indirect addressing mode. >add.sat (16) r[a0.5,0]<1>:uw r[a0.5,0]<16;16,1>:uw 0x0080:uw >add.sat (16) r[a0.5,32]<1>:uw r[a0.5,32]<16;16,1>:uw 0x0080:uw Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> | |||
| 2013-11-06 | assembler/bdw: Add gen8_instruction from mesa | Damien Lespiau | |
| Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> | |||
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index : igt-gpu-tools.git | |
| DRM IGT GPU Tools | Andi Shyti |
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