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Removing igt_skip_on_simulation() from benchmarks since
this feature is not supported anymore.
v2: Rebase
Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Karthik B S <karthik.b.s@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
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Our list was something between Wayland and Linux Kernel list
implementations, right in the uncanny valley.
On top of that it falsely claimed that it's a straight copy from the
Wayland project.
Let's make our impl more akin to the kernel one to ease the cognitive
dissonance for the developers working on all those projects.
This patch:
* mimics the current kernel list interface
* separates IGT helpers in the source files
* adds brief explanation and code example for igt-doc
* introduces igt_list.c as static inlines are not visible in the docs
v2: mimic the kernel instead of wayland (Chris)
- _head suffix for the sentinel/link struct
- _entry_ in iterator names that go over the elements
v3: I forgot to merge this in time and there was another call site
that had to be converted in gem_spin_batch.c
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
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Provide the iterator name as an explicit macro parameter so that it is
known to the caller, and allows for them to properly nest loops over all
engines.
Fixes:
../tests/i915/gem_exec_schedule.c: In function ‘semaphore_noskip’:
../lib/igt_gt.h:84:44: warning: declaration of ‘e__’ shadows a previous local [-Wshadow]
for (const struct intel_execution_engine *e__ = intel_execution_engines;\
^~~
../tests/i915/gem_exec_schedule.c:653:2: note: in expansion of macro ‘for_each_physical_engine’
for_each_physical_engine(i915, other) {
^~~~~~~~~~~~~~~~~~~~~~~~
../lib/igt_gt.h:84:44: note: shadowed declaration is here
for (const struct intel_execution_engine *e__ = intel_execution_engines;\
^~~
../tests/i915/gem_exec_schedule.c:652:2: note: in expansion of macro ‘for_each_physical_engine’
for_each_physical_engine(i915, engine) {
^~~~~~~~~~~~~~~~~~~~~~~~
../tests/i915/gem_exec_schedule.c: In function ‘measure_semaphore_power’:
../lib/igt_gt.h:84:44: warning: declaration of ‘e__’ shadows a previous local [-Wshadow]
for (const struct intel_execution_engine *e__ = intel_execution_engines;\
^~~
../tests/i915/gem_exec_schedule.c:1740:3: note: in expansion of macro ‘for_each_physical_engine’
for_each_physical_engine(i915, engine) {
^~~~~~~~~~~~~~~~~~~~~~~~
../lib/igt_gt.h:84:44: note: shadowed declaration is here
for (const struct intel_execution_engine *e__ = intel_execution_engines;\
^~~
../tests/i915/gem_exec_schedule.c:1719:2: note: in expansion of macro ‘for_each_physical_engine’
for_each_physical_engine(i915, signaler) {
^~~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Andi Shyti <andi.shyti@intel.com>
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Drop the forcewake before libigt tries to wait on it.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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Library was limited for reading registers for only
one device at a time in igt tests.
Changes in this patch give as oportunity to test multiple devices in
the same time.
v8: pack and rename structure, remove unnecessary field
v7: remove unnecessary code
v6: Reword patch. Cosmetic changes.
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Spurio Ceraolo <daniele.ceraolospurio@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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e.g. benchmarks/gem_wsim.c:2936:4: warning: absolute value function ‘abs’ given an argument of type ‘long int’ but has parameter of type ‘int’ which may cause truncation of value [-Wabsolute-value]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Simon Ser <simon.ser@intel.com>
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We can use offsetof for the same effect, much tidier with no dummy
locals.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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Apparently VLA structs (e.g. struct { int array[count] }) is a gcc
extension that clang refuses to support as handling memory layout is too
difficult for it. So calculate the size by hand!
v2: Use alloca().
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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New command line option to allow controling the initial pseudo random
generator seed in order to allow repeatable runs.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Suggested-by: Simon Ser <simon.ser@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Back when gem_wsim used forking it was safe to use the common storage
prng, but after converting to threads it no longer is.
Fix by storing and using a new per workload seed for batch buffer
duration randomness.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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On Icelake second vcs engine is vcs2 instead of vcs1 so add some logical
to physical instance remapping based on engine discovery to support it.
v2:
* Rebase.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Instead of hardcoding the VCS balancing engines, discover, both with the
new engines query, or with the legacy get_param in the fallback case, so
class based addressing always works.
v2:
* Simplify has_engine_query check. (Andi)
* Fix assert on uninitialized variable. (Andi)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@intel.com>
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This will allow applying the discovered engine configuration from a single
place.
v2:
* Consolidate enum to ci conversion.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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To allow exercising the SSEU configuration in combination with Virtual
Engine, allow RCS to be specified in the engine map and use appropriate
index based addressing when applying SSEU configuration to it.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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A new workload command ('S') is added which allows per context slice
(re-)configuration.
v2:
* Only query device SSEU on first use. (Chris)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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A new command line switch ('-s') is added which toggles the low slice
count mode for workloads following on the command line.
This enables easy benchmarking of the effect of running the existing media
workloads in parallel against another client. For example:
./gem_wsim -n ... -v -r 600 -W master.wsim -s -w media_nn480.wsim
Adding or removing the '-s' switch before the second workload enables
analyzing the cost of dynamic SSEU switching impacted to the first
(master) workload.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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For simulating frame split workloads it is useful to express a batch which
ends at the same time as the parallel submission on the respective bonded
engine. For this we add support for infinite batch durations and the batch
terminate command ('T'). Syntax looks like this:
1.RCS.*.0.0
T.-1
First step starts an infinite batch, and second command terminates the
infinite batch with the usual relative workload step addressing.
v2: (Chris)
* Relax the recursive batch with 4096 nops between BB_START.
* Check for at least gen8.
* Simplify relocation entry building.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> # v1
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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A few additional workloads useful for experimenting with scheduling.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
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Engine bonds are an i915 uAPI applicable to load balanced contexts with
engine map. They allow expression rules of engine selection between two
contexts when submissions are also tied with submit fences.
Please refer to the README for a more detailed description.
v2:
* Use list of symbolic engine names instead of the mask. (Chris)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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A new workload command for enabling a load balanced context map (aka
Virtual Engine). Example usage:
B.1
This turns on load balancing for context one, assuming it has already been
configured with an engine map. Only DEFAULT engine specifier can be used
with load balanced engine maps.
v2:
* Lift restriction to only use load balancer when enabled in context map.
(Chris)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Parsing an integer workload descriptor field is a common pattern which we
can extract to a helper macro and by doing so further improve the
readability of the main parsing loop.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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We can improve the parsing loop readability a bit more by avoiding some
line breaks caused by explicit NULL checks.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Support new i915 uAPI for configuring contexts with engine maps.
Please refer to the README file for more detailed explanation.
v2:
* Allow defining engine maps by class.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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v2:
* Remove redundant check. (Chris)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Add support for submit fences in a way similar to how normal input fences
are handled. Eg:
1.RCS.500-1000.0.0
1.VCS1.3000.s-1.0
1.VCS2.3000.s-2.0
Submit fences are signalled when the originating request enters the
submission backend.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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A few more opportunities to compact the code by using the error logging
helper.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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There is a repeated pattern with error handling which can be moved to a
macro to for better readability in the command parsing loop.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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We are moving towards bumping the uAPI headers more often instead of using
too much local struct/ioctl/param definitions since the latter are more
challenging for rebase and maintenance.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Support i915 virtual engine from gem_wsim (-b i915) and media-bench.pl
v2:
* Add vm_destroy. (Chris)
* Remove unneeded braces. (Chris)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Use the client id to alternate the static_vcs balancer (-b context)
across clients with the round robin flag (-R) - otherwise all clients
end up on vcs0 and do not match the context balancing employed by
media-driver.
v2: Put it behind the -R flag.
v3: Don't skip -R flag for -b context in scripts/media-bench.pl
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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Currently we have multiple different parts of IGT that define their own
wrapper around the gettid() syscall (or just call it directly with no
wrapper).
Additionally, add the appropriate #includes for igt_aux.h to make sure
syscall() is available.
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
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One significant usecase for intel_reg/etc. is to be able to examine
the hardware state *before* loading the driver. If the tool forces
the driver to load we've totally lost that capability.
This reverts commit 8ae86621d6fff60b6e20c6b0f9b336785c935b0f.
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Acked-by: Michał Winiarski <michal.winiarski@intel.com>
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It allows us to make things a little bit more generic. Also, we now
require fd rather than doing guesswork when it comes to pci address.
v2: Use readlinkat rather than string concat, move stuff around, provide
a version that does not assert. (Chris)
v3: Print addr on failure, avoid assignment in conditionals. (Chris)
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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librt is required by libintel_tools so express it as mandatory in autoconf
and also drop explicit mentions from Makefile.am.
This also fixes a build warning of:
tests/Makefile.am:134: warning: variable 'pm_rc6_residency_LDADD' is defined but no program or
tests/Makefile.am:134: library has 'pm_rc6_residency' as canonical name (possible typo)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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We do not bother explicitly unmapping memory on exit so no need to store
address and size in the workload step struct.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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mmap(2) mandates size is page aligned.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Move all mmap flavours and support function to separate file in i915
folder. This helps with moving i915 specific functions away from common
libraries.
v2:
- Autotools still exists. (Petri)
- Include gem_mman.h directly. (Chris)
v3:
- Keep includes explicit. (Chris)
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Petri Latvala <petri.latvala@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Meson 0.46.0 fixes the issue that forced us to do the renaming.
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
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We're not using automake to build tarballs anymore.
Acked-by: Petri Latvala <petri.latvala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
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if (p) free(p) does a useless check, free(NULL) is a valid call. Also
assign NULL so we don't end up double-freeing memory if anyone
reorders nr_bos to have a 0 after other values.
Signed-off-by: Petri Latvala <petri.latvala@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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Signed-off-by: Petri Latvala <petri.latvala@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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Allow workloads to specify frequency of preemption points per context.
New workload command ('X') is added to allow this.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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MI_NOOP cannot be preempted which means up to now gem_wsim workloads were
preemptable on batch buffer granularity only.
Add MI_ARB_CHK every 100us so the new default is mid-batch preemption.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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A new workload command ('P') is added which enables per context dynamic
priority control.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Need namespace for new commands and I never documented they are case
insensitive so it is fine.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Need to check we actually are in VCS2 remapping mode!
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Add directory with README file to allow missing syscalls to be defined.
The syscalls themselves will be provided in follow up patches.
v2: add support to autotools
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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Distributions want explicit control over optional parts so they can
state runtime dependencies before building. Let's restore the
functionality autotools used to provide.
Where possible, the selection is done by choosing whether to build a
particular item and the option name is build_$item. Example:
build_overlay. Where not possible, the option name is
with_$item. Example: with_valgrind.
Array options require a bump of required meson version to 0.44. Debian
stable has meson 0.37 which is already too old, stable-backports has
0.45, CI uses 0.45. Mesa's meson requirement is 0.44.1, for a
perspective.
Note, the old hack for not building docs when cross-compiling is
gone, as doc building can be explicitly controlled now.
v2: glib not optional
v3: bump meson version to 0.44
Signed-off-by: Petri Latvala <petri.latvala@intel.com>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Eric Anholt <eric@anholt.net>
Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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While for stressing the system we want to submit as many batches as we
can as that shows us worst case impact on system latency, it is not a
very realistic case. To introduce a bit more realism allow the batches
run for a user defined duration.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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Normally we use a hog per CPU to ensure that the system is fully
loaded to see how much latency we cause. For simple sanitychecking, allow
ourselves to limit it to just one CPU hog.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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