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Add required library interfaces to support VM_BIND
functionality.
Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
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Will be useful later.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
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Most users shouldn't care about such an interface, but where required,
this should be useful to aid in setting NEEDS_CPU_ACCESS for a given BO.
Underneath we try to smooth over needing to provide an explicit SMEM
region, or if this is SMEM-only, we don't want the kernel to throw an
error.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
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For now limit to direct callers.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
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For now dump into i915_drm_local.h. Once the uapi on the kernel side is
merged, and is part of drm-next, we can sync the kernel headers and
remove this.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
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IGT commit 68efa99c62e2 ("i915/gem_eio: Exercise object creation while
wedged") extended lib/i915/intel_memory_region.h header with a definition
of new struct gem_memory_region. That structure contains a member of type
struct drm_i915_gem_memory_class_instance, but definition of that type is
not available unless "i915_drm.h" header is included. Include the missing
header.
../lib/i915/intel_memory_region.h:118:44: error: field ‘ci’ has incomplete type
118 | struct drm_i915_gem_memory_class_instance ci;
Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
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Adding crc32 calculation on gpu gives us new possibility to verify data
integrity without relying on trust cpu mapping is correct.
Patch introduces calculating crc32 on DG2 only. On older gens ALU
(MI_MATH) doesn't support bit-shifting instructions as well as multiply
or divide. Emulating n-bit shifts cost hundred of instructions with
predicated SRM (works on render engine only). Another limitation is lack
of indexed load / store. On DG2 we can use WPARID and CS_MI_ADDRESS_OFFSET
to achieve indexed operation on memory.
Due to performance reasons (cpu crc32 calculation even on WC memory is
still much faster than on gpu, also depends on calculated object memory
region) calculation will complete in reasonable of time only for few MiB.
v2: - use registers relative to engine to allow run on all engines (Chris)
- use predication instead of memory access to get better performance
(Chris)
- add location where crc32 implementation comes from (Petri)
v4: - use common crc32 table from igt_crc
- add docs
v5: - change BIT(n) to informative macros (Zbigniew)
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Acked-by: Petri Latvala <petri.latvala@intel.com>
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Promote intel_os.c helpers to igt_os.c, so that I can re-use them for
some additional msm tests. Just big churny rename, no functional change.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
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Probing alignment/offset (A/O) in default context works properly only
when there're no processes which competes on same vm space. To avoid
risk that single probe will be called on already used offset in another
process lets use dedicated context for this purpose if possible.
In other words when forking occur without A/O cache filled (subject of
COW) children will exercise A/O individually. Using same default context
leads to risk of probing offset which is in flight in another child
thus we can get different A/O. Such behavior is not allowed as allocator
infrastructure requires same type, strategy and alignment on single vm.
We expect coherent A/O in different children so we try to use separate
context to fill this requirement.
v2: on old gens where're no logical contexts use default context
v3: adding missing condition for context destroy (Matt)
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Fixes: https://gitlab.freedesktop.org/drm/intel/-/issues/5729
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The patch "95898ed6856e drm/i915: Drop debugfs/i915_next_seqno"
removed this file so remove the use of this in igt as well.
Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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Ensure we get sensible responses for both valid and invalid usage of
this query item.
Note that unlike the traditional topology query we do not try to compare
the values returned against the old I915_PARAM ioctl. Xe_HP already
uses a full 32-bit mask for subslices and we expect upcoming platforms
to increase the mask size to 64 or beyond (i.e., the hardware starts
using multiple registers to express the mask); since the old I915_PARAM
ioctl can only return a 32-bit value it will be unable to express the
full mask for upcoming platforms.
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
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ADL-N and ADL use the same OA metrics. Add ADL-N support
for OA tests.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
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Blitter commands became complicated thus manual bitshifting is error
prone and hard debugable - XY_BLOCK_COPY_BLT is the best example -
in extended version (for DG2+) it takes 20 dwords of command data.
To avoid mistakes and dozens of arguments for command library provides
input data in more structured form.
Currently supported commands:
- XY_BLOCK_COPY_BLT:
a) TGL/DG1 uses shorter version of command which doesn't support
compression
b) DG2+ command is extended and supports compression
- XY_CTRL_SURF_COPY_BLT
- XY_FAST_COPY_BLT
Source, destination and batchbuffer are provided to blitter functions
as objects (structs). This increases readability and allows use same
object in many functions. Only drawback of such attitude is some fields
used in one function may be ignored in another. As an example is
blt_copy_object which contains a lot of information about gem object.
In block-copy all of data are used but in fast-copy only some of them
(fast-copy doesn't support compression).
v2-v3: address review comments (Kamil)
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
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If driver is able to report capabilities we want to use them in easy way.
For example it can support blitter "block_copy" (XY_BLOCK_COPY_BLT
command) and reports it in sysfs. We add then capabilities helpers to
read these properties. Helpers allows checking does driver knows
capability (by checking sysfs "known_capabilities" file) and supports it
(by checking sysfs "capabilities" file). Dedicated helper was added to
verify "block_copy" capability.
Signed-off-by: Chris Wilson <chris.p.wilson@intel.com>
Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Arjun Melkaveri <arjun.melkaveri@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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Add new library intel_mocs for mocs settings.
v2: make definitions and struct private (Kamil)
Signed-off-by: Apoorva Singh <apoorva1.singh@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Arjun Melkaveri <arjun.melkaveri@intel.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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Handling batchbuffers with softpin requires tracking its state otherwise
we can write to inflight batchbuffer and encounter gpu hang. Gem pool
adds such tracking (similar to libdrm bo cache) and provides free and
ready to use bo. If pool has no free bo new one is created what means pool
can be growing during test execution. When test completes freeing buffers
and memory is called from igt_core so no additional cleanup is necessary.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
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Make sure that we can continue to create buffers, primarily to service as
framebuffers for scanout, even while the device is wedged.
v2:
- Deleted gem_memory_topology.[ch] and moved it's content
to intel_memory_region.[ch]. [Ashutosh]
- Fixed checkpatch.pl warning.
v3:
- Added igt_describe() for new added tests. [Kamil]
Cc: CQ Tang <cq.tang@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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The present gen12 rendercopy is not compatible with gen21p71(dg2).
Add rendercopy support for dg2 and introduce gen12p71_render_copyfunc
function to use it.
Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
Signed-off-by: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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Not all systems supports dma-buf or supports it partially thus tests which
relies on this functionality should be skipped. Partially means some
memory regions can support it whereas other not. Add a helper function
which will verify dma-buf support on memory regions and create a set of
those supported.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Tested-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
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Various tests want to configure engine properties such as pre-emption
timeout and heartbeat interval. Some don't bother to restore the
original values again afterwards. So, add a helper to make it easier
to do this.
v2: Fix for platforms with no pre-emption capability.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
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With era of new gens we're enforced to use no-reloc (softpin). This
brings few problems like vm range limitations which were well solved
by the kernel. This can be handled also in userspace code by adding
gen related conditionals or by trying to detect the constraints.
Lets try to do this dynamically and detect safe start offset and
alignment for each memory region we got. This should be universal solution
regardless hw limitations and bugs. As such detection is not lightweight
technique add also some caching structures to handle consequtive calls
about same data.
v2: unify cache
v3: move allocation of cache entry out of mutex
v4: remove assert on allocation newentry, just skip adding to cache
v5: fix function documentation (Ashutosh)
v6: remove unnecessary buffers count initialization (Ashutosh)
add 48b flag for pinning object
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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RPLS and ADLS use the same OA metrics. Add RPLS support for OA tests.
Resolves: https://gitlab.freedesktop.org/drm/intel/-/issues/4808
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Acked-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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As Ashutosh noticed I've handled errors from the kernel too wide
packing it to same error bag and returning system memory region in this
case. That's of course is wrong and can lead to return system memory on
discrete if invalid arguments would be passed to the query.
Return previous behavior of query memory regions handling -ENODEV path
individually. For this error lets assume we got kernel which doesn't
support this query yet so returning system memory region is a reasonable
choice because this region exists for all of i915 gens.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Reported-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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For stable kernels we get -ENODEV on integrated where gem_create_ext()
call tries to allocate bo in system memory. Instead of asserting this
case we can fallback to gem_create() as this allocation can be resolved
using legacy call.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
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For stable kernels we can currently get -ENODEV on integrated gens
when no CONFIG_DRM_I915_UNSTABLE_FAKE_LMEM is set.
Provide system memory region stub to avoid failing on querying
kernel for memory regions.
v2: use offsetof() instead of manual size calculation
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
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Also delete PXP defines / structures from i915_drm_local.h.
Taken from 806acd381960 ("Merge tag 'amd-drm-fixes-5.16-2021-11-03' of https://gitlab.freedesktop.org/agd5f/linux into drm-next")
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
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mapping
The i915 currently has 2k visible priority levels which are currently
unique. This is changing to statically map these 2k levels into 3
buckets:
low: < 0
mid: 0
high: > 0
Update gem_exec_schedule to understand this. This entails updating
promotion test to use 3 levels that will map into different buckets and
also add bit of delay after releasing a cork beforing completing the
spinners to give time to the i915 schedule to process the fence and
release and queue the requests.
Also skip any tests that rely on having more than 3 priority levels.
v2: Add a delay between starting releasing spinner and cork in
promotion, add local define for static mapping engine info
v3:
(Daniele)
- Update commit message explaining why delay is needed,
unconditionally add delay
v4:
(Tvrtko)
- Reduce sleep period
(Daniele)
- Add comment in code by sleep
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
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The function names gem_has_guc_submission and gem_has_execlists and
gem_has_semaphores are ambiguous. After "lib/i915: Return actual submission
method from gem_submission_method" these functions return which submission
method the kernel is actually using, not merely one which is
present (e.g. execlist submission is present on all kernels on which GuC
submission is present).
Therefore change the function names to clarify that they return the actual
submission method being used, not merely one which is present.
Suggested-by: John Harrison <john.c.harrison@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
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gem_submission_method() purports to return the currently used submission
method by the kernel, as evidenced by its callers. Therefore remove the
GEM_SUBMISSION_EXECLISTS flag when GuC submission is detected.
This also fixes gem_has_execlists() to match its description, previously
gem_has_execlists() would return true even if GuC submission was actually
being used in the driver.
v2: Or gem_has_execlists call-sites with gem_has_guc_submission to make the
new code equivalent to the previous code.
v3: Clarify that submission method is either guc (0x4), execlists (0x2) or
legacy without semaphores (0x0) or legacy with semaphores (0x1)
v4: Submission methods are now clearly defined as one of guc (3),
execlists (2) or legacy ring buffer (1)
Reported-by: John Harrison <john.c.harrison@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
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As part of cleaning up the submission library functions, remove the
"semaphores" submission method. Semaphores are not a "submission method",
semaphores can be used with GuC, execlists or legacy ring buffer submission.
Suggested-by: John Harrison <john.c.harrison@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: John Harrison <john.c.harrison@intel.com>
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Add compute class to engine base names.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Priyanka Dandamudi <priyanka.dandamudi@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Arjun Melkaveri <arjun.melkaveri@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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Add I915_ENGINE_CLASS_COMPUTE define value.
Signed-off-by: Priyanka Dandamudi <priyanka.dandamudi@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Arjun Melkaveri <arjun.melkaveri@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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v2: rename to gem_allows_obj_alignment() (Ashutosh)
With newer gens passing non-zero alignment will be forbidden.
Add check which detects kernel supports it or not.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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Add typechecking to the min/max macros and make their locals truly
unique-ish to reduce the risk of shadowing.
v2: small bug fix, write also height coordinate on rotation
test. (jheikkil)
v3: Fix up a couple of other max/max_t instances (Ashutosh)
Signed-off-by: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Chris Wilson <chris.p.wilson@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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That was my mistake during review and merge since I had
ignored the rules documented at README.md and considered
drm-intel branches would be enough. I'm sorry.
Instead, I should had used the new lib/i915/i915_drm_local.h
as Ashutosh pointed out.
Fixes: 4d5f8bcd2e35 ("i915_drm.h sync")
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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In 22643ce4014a ("Return allocated size in gem_create_in_memory_regions()
and friends") we modified __gem_create_in_memory_regions and
gem_create_in_memory_regions to return the allocated size for buffer
objects. However, this also unnecessarily complicates programming in the
majority of cases where the allocated size is not needed. For example in
several cases it requires tracking the requested and allocated sizes
separately, the size used must be strictly uint64_t etc.
In order to simplify things and provide greater flexibility, here we change
22643ce4014a to follow the same scheme followed in gem_create_ext (and in
gem_create) where __gem_create_ext returns the allocated size but
gem_create_ext doesn't. With this change, __gem_create_in_memory_regions
returns the allocated size for situations where it is needed but in the
majority of cases where the allocated size is not needed we can just use
gem_create_in_memory_regions for casual use as before.
v2: Store requested not allocated bo size in intel_buf->size (Zbigniew)
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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Often the allocated size is of interest and is different from the
requested size. Therefore return allocated size for the object (by
__gem_create_ext()) in gem_create_in_memory_regions() and friends.
v2: Assign buf->size correctly in __intel_buf_init (Zbigniew)
Cc: Andrzej Turko <andrzej.turko@linux.intel.com>
Cc: Zbigniew Kempczynski <zbigniew.kempczynski@intel.com>
Cc: John Harrison <John.C.Harrison@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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Sync to get I915_MMAP_OFFSET_FIXED define value.
Taken from kernel commit:
commit 7961c5b60f23 ("drm/i915: Add TTM offset argument to mmap.")
Acked-by: Petri Latvala <petri.latvala@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
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The FIXED mapping is only used for discrete, and mapping type
is pre-defined. This disables the other type of mmap
offsets when discrete memory is used.
Taken from kernel commit:
commit 7961c5b60f23 ("drm/i915: Add TTM offset argument to mmap.")
Changes since V3:
- Split change in two commits - Matthew Auld
Changes since V2:
- Add previous logic check for GTT offset type - Ashutosh Dixit
- Added documentation for library API change - Daniel Vetter
Changes since V1:
- Make logic more readable - Petri Latvala
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
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Functions which extract information from drm_i915_query_memory_regions
structures passed via their pointer as an argument don't modify those
structures, let them accept that content declared as constant.
Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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Intel memory region header declares some functions with a pointer to a
structure defined elsewhere as one of their arguments. Forward declare
that structure to avoid compiler warnings.
../lib/i915/intel_memory_region.h:69:19: warning: ‘struct drm_i915_gem_memory_class_instance’ declared inside parameter list will not be visible outside of this definition or declaration
69 | struct drm_i915_gem_memory_class_instance *mem_regions,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../lib/i915/intel_memory_region.h:73:15: warning: ‘struct drm_i915_gem_memory_class_instance’ declared inside parameter list will not be visible outside of this definition or declaration
73 | struct drm_i915_gem_memory_class_instance *mem_regions,
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
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Might be useful in some tests, where we are not explicitly testing WC
maps, but rather just require something that is "device coherent", which
should also play nice on discrete platforms.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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We need to also iterate the fixed mode in the tests which rely on this.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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On discrete we only support the new fixed mode.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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On discrete we only support the new fixed mode.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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On discrete we need to fallback to this mode.
v2(Ashutosh):
- Move it up the pecking order
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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We need this for discrete.
v2(Ashutosh):
- use the new i915_drm_local.h infrastructure, and drop the LOCAL prefix
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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It is necessary on occasion to add uapi declarations to IGT before they
appear in imported kernel uapi headers. This is typically done at present
using LOCAL declarations (or #ifndef's) which are dispersed across multiple
source and header files. Such declarations sometimes linger on in the code
for months or years till someone thinks of cleaning them up.
As opposed to this, provide a central location (in i915_drm_local.h) for
such early uapi declarations in IGT. These declarations will be added to
i915_drm_local.h exactly as they are expected to appear in the kernel uapi
headers, i.e. without the LOCAL_ or local_ prefix. They can be cleaned up
when the uapi headers are sync'd or they can live on (if they don't
conflict with the kernel headers) but at least they will be in a single
place and more visible. At least that is the hope.
Cc: Petri Latvala <petri.latvala@intel.com>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
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While checking for LMEM support on older kernels with the
DRM_I915_QUERY_MEMORY_REGIONS, it may fail with EINVAL.
Instead of abort/asserting the test, make sure gem_has_lmem
remains functional.
V2:
* Rebase
V3:
* Update commit message (Ashutosh)
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Vidya Srinivas <vidya.srinivas@intel.com>
Signed-off-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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If the regions query fails then the error will be encoded in the
item.length, while the ioctl will still return success.
Reported-by: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
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