Age | Commit message (Collapse) | Author |
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Bspec: 11431
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Javier Villavicencio <javier.villavicencio@intel.com>
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Apparently nothing changed since BDW on these instdone bits.
So let's reuse instead of empty duplication.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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Just report that we don't recognise the chipset rather than explode.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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gen9 uses the same bits as gen8.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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Stragglers.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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The GEN6_INSTDONE_1 and GEN6_INSTDONE_2 registers are just the old
INSTDONE_I965 and INSTDONE_1 registers but renamed. Let's use the old
names (this is what the kernel does).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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This is the only place where they are used and we've even started using
1 << n constants with gen 7.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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That's how the registers are named in the kernel defines.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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[danvet: added GAM and GAFM bits.]
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... and test for what we mean instead.
Reported-by: Diego Celix <dcelix@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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This is vital in a multi-GPU system so that we only test the Intel card
and not the discrete GPUs.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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A few of the tools can be performed post-mortem from a different system,
so it is useful to be able to compile those tools on those foreign
systems. Obviously, any program to interact with the PCI device or talk
to GEM will fail on a non-Intel system.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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