Age | Commit message (Collapse) | Author |
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There is create function with relocations, so add its
counterpart without it.
v3: moved down after intel_bb_create_with_relocs_and_context,
added function description (Zbigniew review)
v2: change to HIGH_TO_LOW allocation (Zbigniew)
Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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Introduce support for the new Tile4 format, which is
4K column-major tiles consisting of 64B row-major subtiles,
with same base structure as Y Tile(16B OWords * 4)
v2: place I915_TILING_4 correctly.
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Jeevan B <jeevan.b@intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
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After subtest ends, due to normal flow or after fail by
igt_assert, igt_core inits intel_allocator before next subtest,
and this makes allocator handle keeped in intel_batchbuffer
invalid. Moreover any call to intel_allocator can result in
fail as there are no allocators until first allocator_open.
Add tracking intel_butchbuffer if it is using allocator and
recreate its allocator handle and offsets from igt_core before
next subtest.
Add flag for turn on tracking and a helper function for it with
default value off. It will not change behaviour of already used
tests. Use case is for standalone runs with many subtests like
gem_concurrent_blit.
v2: add tracking flag with default off (Zbigniew)
v3: add and correct functions descriptions (Zbigniew)
Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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For gens where relocations are supported kernel can set object offset
everywhere it wants but it honours the alignment setting.
For gens where we got no relocations and setting alignment is not
allowed in exec object we want to ensure allocator will still use it
to properly align the offset.
Detect kernel caps in alignment setting and use it for reloc/no-reloc
paths accordingly.
v2: rename to gem_allows_obj_alignment() (Ashutosh)
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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Add a subtest to verify that reusing a stale protected context
in a gem_execbuff after a teardown fails with -EIO error because
it's banned. Trigger the teardown via the pxp invalidation
debugfs that simulates a HW teardown IRQ.
NOTE: The end-to-end architecture requirement includes that
any break in the links of the PXP sessions needs to trigger a
full teardown and the application needs to be made aware of that
allowing it to re-establish the end-to-end pipeline of buffers,
contexts and renders again if it chooses to. This stricter
behavior targets only contexts created with PXP enabled.
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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Eventually when we get to testing PXP rendering capability,
we shall reuse lib's rendercopy feature. Rendercopy libraries
shall retrieve information about PXP-session-enablement and
which buffers are protected from these new flags.
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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For testing gem_huc_copy on no-reloc platforms we need to pass
allocator handle and object sizes to properly acquire offsets from
allocator.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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Adjust igt_fb library + prime_vgem test as they are blitter src copy
users.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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For newer gens kernel will reject relocations by returning -EINVAL
so we should support allocator and acquire offsets for blit.
Signed-off-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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It's not used by anything other than the tests for that functionality
and it relies on setting the VM via SET_CONTEXT_PARAM which is
deprecated. Delete it for now. We can add it back in later if it's
actually useful and do it properly then.
v2 (Zbigniew Kempczyński):
- Also remove intel_bb_detach_intel_buf()
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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From now on intel_bb starts tracking added/removed intel_bufs.
We're safe now regardless order of intel_buf close/destroy
or intel_bb destroy paths.
When intel_buf is closed/destroyed first and it was previously added
to intel_bb it calls the code which removes itself from intel_bb.
In destroy path we go over all tracked intel_bufs and clear tracking
information and buffer offset (it is set to INTEL_BUF_INVALID_ADDRESS).
Reset path is handled as follows:
- intel_bb_reset(ibb, false) - just clean objects array leaving
cache / allocator state intact.
- intel_bb_reset(ibb, true) - purge cache as well as detach intel_bufs
from intel_bb (release offsets from allocator).
Remove intel_bb_object_offset_to_buf() function as tracking intel_buf
updates (checks for allocator) their offsets after execbuf.
Alter api_intel_bb according to intel-bb changes.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Petri Latvala <petri.latvala@intel.com>
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Previously intel-bb just used default allocator settings (safe,
chosen for work from the box). But limitation is not good if we want
to exercise non-standard cases (vm ranges for example). As allocator
provides passing full settings lets intel-bb also allows to use them.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Petri Latvala <petri.latvala@intel.com>
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Refactor the intel-bb interface to introduce the IGT allocator for
specifying the position of objects within the ppGTT.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Petri Latvala <petri.latvala@intel.com>
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Enable fast clear rendering on rendercopy function.
v2: Modify _gen9_render_copyfunc to support fast clear (Matt)
Enable fast clear bit on 3D sequence (Matt)
Add helper function to figure out clear color modifier (Matt)
v3: Remove unrelated line additions/removes
v4: Fast clear with color (Imre)
v5: Write raw 32-bit color values to register (Imre)
Require 32-bit color format
v6: Rebase to use batchbuffer without libdrm dependency
v7: Enable clear color (Nanley)
v8: Various cleanups (Imre)
Modificate buffer creation (Imre)
v9: Renaming of render_copyfunc() to render_op() (Imre)
Remove igt_render_clearfunc variable (Imre)
v10: Dst buffer width division by 64 pixels and height by 16 lines (Imre)
Reorder ss10 bit fields (Imre)
Relocate buffer with clear color value enabled (Imre)
Set fast clear enable bit in correct dword (Imre)
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
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This patch adds intel_bb_copy_intel_buf to make copying a whole
intel_buf easier and more readable.
Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Unknown, so future, gen are marked as -1 which we want to treat as -1u
so that always pass >= gen checks.
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2298
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Acked-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
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With upcoming of allocator code we need to ensure batch will execute
with appropriate context. If mismatch between allocator data and batch
could lead to strange or wrong results. All functions which could change
context in execbuf called from intel_bb were removed.
As an allocator requires size (which was not previously required in
intel_bb) adding object to intel_bb is now mandatory.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Use intel_bb as main batch implementation to remove libdrm dependency.
Rewrite all pipelines to use intel_bb and update render|vebox_copy
function prototypes.
Note that this will introduce compile failures into the indiviual users
until they are transitioned over to the new interface in the following
patches. The process is completed with "lib/rendercopy_bufmgr: remove
rendercopy_bufmgr."
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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When objects array is reallocated index tree contains invalid pointers
and we got segmentation fault. Fix changes of the strategy of keeping
objects - now we have two indexes - cache (all objects added
previously to the bb) and current (contains objects added after soft
bb reset).
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Code for dumping bb to log as base64 which can be used when
something wrong happened.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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To cover rendercopy in dependent tests we need to add the following:
1. relocation in any handle
Previously batchbuffer was the main target of relocations. As AUX
table require relocations too add support for that in intel_bb
2. set/get default alignment
Add default alignment for objects added to intel_bb (AUX tables use
different alignment for different objects)
3. add intel_buf to intel_bb
Save proposed address to intel_buf, clear flags on reset
4. add set/clear flag functions
5. unification of intel_bb_flush.*() functions
6. fixing indentation
7. change alignment constraints on gen3
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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This test case loads the HuC copy firmware to copy the content of
the source buffer to the destination buffer.
v2: (Tony Ye)
* Restructured some functions and files.
* Defined the copy buffer size as 4K explicitly as the HuC Copy kernel
always copy 4K bytes from src buffer to dst buffer.
v3: (Feng Qi, Antonio Argenziano, Tony Ye)
* Restructured some functions as igt requested, exclude libdrm function call.
* Remove huc function wrappers
* Random initialize source input buffer
v4: (Robert Fosha)
* Fix autotools build failure.
v5: (Feng Qi, Tony Ye)
* Released all bo buffer after huc copying.
* Restructured huc_copy() function.
v6: (Feng Qi)
* Fixed the function of huc enabling and status check
* Added huc_copy to fast feedback testlist
v7: (Tony Ye, Feng Qi, Robert Fosha, Chris Wilson, Michal Wajdeczko)
* Check error with HUC_STATUS ioctl instead of debugfs
v8: (Antonio Argenziano)
* Remove unnecessary variable.
* Add huc_load subtest.
* Move failure checks out of igt_fixture.
* get_huc_status() returns errno and then status as a parameter
v9: (Antonio Argenziano)
* Remove huc_load subtest - to be added later.
v10:
* Rebase
* Remove huc_load subtest from fast-feedback.testlist.
Signed-off-by: Feng Qi <feng.qi@intel.com>
Signed-off-by: Tony Ye <tony.ye@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
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As we're going toward removing libdrm from rendercopy tests some
additional code in intel_bb is required. So add new functions
and fix memory issues in the reset path.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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For some scenarios we want to keep previous objects and their offsets
and recreate only batchbuffer object. To allow user do that add
bb reset function which can or not purge collected objects from
previous run.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Remove libdrm functions and replace them with new ones after removing
_v2 suffix introduced for transition state.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Function is now libdrm-free, but mixes calls to replaced and "_v2"
versions. This cleanup and old code removal will be addressed
in the another commit.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Media fill function selection for "_v2" version.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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gem_gpgpu_fill test is spread over different generations (gen >= 7)
so some transitional state is required until all gens will be
rewritten to new intel_bb code without libdrm dependency.
So, let's define new igt_fillfunc_v2_t to be new fill function.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Simple batchbuffer facility which gathers and outputs relocations.
v2: make bb api more consistent and universal
v3: fix compiling issues on non-x86 arch
v4: add indexing tree and marking object as render target
v5: randomizing addresses to avoid relocations
v6: fix invalid reallocation size (Chris)
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Add a method that uses the XY_SRC_COPY_BLT instruction for copying
buffers using the blitter engine.
v2: Use uint32_t for parameters; fix stride for Gen2/3
v3:
- Fix 64b relocations. (Chris)
- Rename func to igt_blitter_src_copy(), being the only version of
the same functionality. (Chris)
- Use the existing instruction definition of MI_FLUSH_DW.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Vanshidhar Konda <vanshidhar.r.konda@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
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igt_buf has some fields which can be interpreted differently across
vendors (ccs structure). Patch adds functions which are aware of
meaning of this field.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Add the missing bits to the Vebox copy and AUX pagetable helpers for
copying YUV FBs with the Vebox engine.
Cc: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
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UV FBs have two color surfaces so extend the igt_buf struct accordingly
to support blitting such FBs.
The patch is produced with the coccinelle patch below.
No functional changes.
@@
@@
struct igt_buf {
...
- uint32_t stride;
...
- uint32_t size;
+ struct {
+ uint32_t stride;
+ uint32_t size;
+ } surface[2];
...
};
@@
struct igt_buf b;
@@
<...
(
- b.stride
+ b.surface[0].stride
|
- b.size
+ b.surface[0].size
)
...>
@@
struct igt_buf *b;
@@
<...
(
- b->size
+ b->surface[0].size
|
- b->stride
+ b->surface[0].stride
)
...>
@@
identifier I;
expression E1;
expression E2;
@@
(
struct igt_buf I = {
- .size = E1,
- .stride = E2,
+ .surface[0] = {
+ .size = E1,
+ .stride = E2,
+ },
};
|
struct igt_buf I = {
- .size = E1,
+ .surface[0] = {
+ .size = E1,
+ },
};
|
struct igt_buf I = {
- .stride = E1,
+ .surface[0] = {
+ .stride = E1,
+ },
};
)
v2:
- Rebase on latest upstream. (Mika)
Cc: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
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YUV FBs have two CCS surfaces so extend the igt_buf struct accordingly
to support blitting such FBs.
The patch is produced with the coccinelle patch below, along with some
w/s fixup.
No functional change.
@@
@@
struct igt_buf {
...
struct {
uint32_t offset;
uint32_t stride;
- } aux;
+ } ccs[2];
...
};
@@
struct igt_buf *b;
@@
(
- b->aux.offset
+ b->ccs[0].offset
|
- b->aux.stride
+ b->ccs[0].stride
)
@@
struct igt_buf b;
@@
(
- b.aux.offset
+ b.ccs[0].offset
|
- b.aux.stride
+ b.ccs[0].stride
)
Cc: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
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Use the igt_buf compression field to determine the compression type for
a buffer, instead of the fact that AUX stride is set. We need to look at
the former one anyway to distinguish between compression types.
Cc: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
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To produce surfaces that are compressed using the media compression
format we need to use one of the media engines. The simplest way for
this is to use the vebox engine's tiling convert command, so add support
for this.
v2:
- Rebase on latest igt. (Mika)
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Brian Welty <brian.welty@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
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A follow-up patch will add more subtests with varying source and
destination memory compression format and a way to force using the vebox
engine instead of the render engine for blitting. Prepare for that by
describing the compression types explicitly. Also add a flag for
subtests that do a blit from multiple source buffers with different
tilings into the destination buffer. This is not supported by the vebox
copy function (added later) due to the restrictions on defining
arbitrary source,destination surface regions for vebox blits.
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Brian Welty <brian.welty@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
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GEN12 supports color clear feature on the 3rd plane. The patch
updates rendercopy function to and buffers to support clear color.
Surface state bitgroups 12 and 13 are updated to support clear value
or depth clear value.
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Radhakrishna Sripada<radhakrishna.sripada@intel.com>
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Simple test which exercises the VME fixed function block.
v2: (Tvrtko Ursulin)
* Small cleanups like copyright date, tabs, remove unused bits.
v3: (Tony Ye)
* Added curbe data entry for dst surface.
* Read the dst surface after the VME kernel being executed.
v4: (Tony Ye)
* Added the media_vme.gxa kernel source code and compile instructions.
v5: (Tvrtko Ursulin)
* Added hang detector.
v6: (Tvrtko Ursulin)
* Replace gem_read with gem_sync. (Chris Wilson)
Signed-off-by: Tony Ye <tony.ye@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Tony Ye <tony.ye@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
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We want to allow bpp = 8 or 16, so make sure we set the bpp
in igt_buf. This way we can extend rendercopy to support
other values for bpp.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
[mlankhorst: Fix double ;; (Ville]
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Store a bit of aux surface state in igt_buf. This will be needed
for rendercopy AUX_CCS_E color compression.
We also have to sprinkle memset()s and whatnot all over to make
sure the current igt_buf users don't leave the aux stuff full
of stack garbage.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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No one generally needs to modify the igt_bufs we pass around,
so make them const.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Batch functions were copy/pasted across several libs.
With moving it into intel_batchbuffer lib test can now be
easly maintained without worrying that we forgot to modify
older version of lib.
v2: Added documentation into lib and rebased patch
v3: Fixed typos and rebased patch
v4: Fixed documentation issues
v5: Rename, clean up of leftovers from previous version
and documentation polishing
v6: Fixing assert
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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structure
With a removal of all references to state variable there is
no longer any need to keep it in structure.
v5: Rebase
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
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Nothing uses this currently, but other copy functions have the same delta now.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
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Adding a delta offset will allow us to copy planar framebuffers with this
function.
Changes since v1:
- Set src and destination addresses to the delta, in case BO is mapped at offset 0.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com> #v1
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When drawing with cairo to Y/Yf tiled FBs we use a temporary linear
buffer which is mapped to the CPU, but the fast blit needed for this
only expects 32 bpp FBs. Add support for other bpps too.
This is needed for upcoming patches testing non-32bit bpp formats with
Y/Yf tiling.
Thanks to Ville for explaining why we need the temporary buffer. (Looks
like for Y tiling we could do without, but that's a separate topic.)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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The media spin utility is derived from media fill. The purpose
is to create a simple means to keep the render engine (media
pipeline) busy for a controlled amount of time. It does so by
emitting a batch with a single execution thread that spins in
a tight loop the requested number of times. Each spin increments
a counter whose final 32-bit value is written to the destination
buffer on completion for checking. The implementation supports
Gen8, Gen8lp, and Gen9.
v2: Apply the recommendations of igt.cocci.
Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
Tested-by: Lei Liu <lei.a.liu@intel.com>
Signed-off-by: Thomas Wood <thomas.wood@intel.com>
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Signed-off-by: Thomas Wood <thomas.wood@intel.com>
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