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2012-10-10fix warn: 'div' shadows a global declarationImre Deak
Signed-off-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-10-09lib: remove auto-quiescenting of the gpuDaniel Vetter
In retrospective, this is an ugly idea. Any tests that needs this can call it themselves.
2012-10-09lib: make drmtest_progress more robustDaniel Vetter
2012-10-02lib: helper to convert gem_hanlde to drm_intel_boDaniel Vetter
2012-10-01drmtest: use do_or_dieDaniel Vetter
2012-08-30clang: Fix warnings found through clang.Ben Widawsky
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-08-27Add bare-metal interface to adjust cacheing (i.e. snoop status) of a boChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-08-27mmio: Limit the uc- mapping to only map the registersChris Wilson
In the future, we may like to enable wc mapping of at least the GATT, and so causing a conflict if we attempt to map the entire bar as uc- here. Obviously we need a better fallback plan, but for the moment only attempt to map the portion of the pci space that we use for register access. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-08-25s/NO_PID/NOP_IDDaniel Vetter
Alan typo'ed it, I've failed to notice :(
2012-08-24Rename NOPID to NO_PID to avoid conflict with Solaris NOPIDAlan Coopersmith
Solaris <sys/types.h> already has #define NOPID (pid_t)(-1) Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-08-21tools: Added intel_dpio_read and intel_dpio_writeVijay Purushothaman
In Valleyview the DPLL and lane control registers are accessible only through side band fabric called DPIO. Added two tools to read and write registers residing in this space. v2: Moved the core read/write functions to lib/intel_dpio.c based on Ben's feedback Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-08-08tools/reg_dumper: really dump pipe C regsDaniel Vetter
Not just a copy of pipe B. Meh. Also kill a few redudant #define for pipe B - they match pipe A.
2012-08-07lib: add more Haswell PCI IDsPaulo Zanoni
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
2012-08-07tools/reg_dumper: dump pipe C regsDaniel Vetter
Also reorder the pipe B regs a bit to be consisten with pipe A.
2012-07-26tests/testdisplay.c: Add a option '-r'.Yi Sun
With the option '-r', the testdisplay could paint a 2-D bar code(QR bar code) on the screen. The word "pass" is hiden in the bar code image. Further more, with this option, testdisplay will wait until a system signal 'SIGUSR1' coming after each mode setting. This function is for another program to control testdisplay. danvet: Fix up the missing static. Signed-off-by: Yi Sun <yi.sun@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-23tests: add basic re-importing prime testDaniel Vetter
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-07-23shut up the compiler a bitDaniel Vetter
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-06-30rendercopy_gen7: add support for haswellBen Widawsky
Only compile tested. Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-29context: libdrm wrappersBen Widawsky
This wraps libdrm functionality to exec with contexts. This patch shouldn't be applied until libdrm for contexts is updated. Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-28lib: add a gen7 rendercopyBen Widawsky
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-14context: update for new execbuf2 elementBen Widawsky
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-13intel_reg_dumper: dump more PM registersEugeni Dodonov
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
2012-06-11add VLV PCI IDJesse Barnes
This allows the tests to run on the prototype boards.
2012-06-04test/gem_gtt_speed: Add a baseline test for the performance of a CPU mmapChris Wilson
When looking at the pwrite/pread/wc performance, it is useful to judge that against the performance of an ordinary CPU mmap. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-29lib: fix gen5 workaround emissionDaniel Vetter
Using BEGIN_BATCH can lead to a nice inf recursion through require_space -> flush_batch -> BEGIN_BATCH. Also fix things up to always require BATCH_RESERVED. We need 2 dwords for the gen5 workaround and 2 dwords for MI_BB_END.
2012-05-22lib: extract kmstest_dump_modeDaniel Vetter
2012-05-22lib: extract kmstest_create_fbDaniel Vetter
We should get more kms tests soon, and not needing to copy-paste a nice test pattern should be useful. That establishes a firm depency of i-g-t on cairo over everything, but I don't care so much about that. Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-22tests: use drm_open_any moreDaniel Vetter
And fix it up to not leak open fds, which kills all the master only stuff.
2012-05-08tools: add Haswell registers into intel_reg_dumperEugeni Dodonov
For now, only print their content for diffing, but also add the necessary bits that can be used for more verbose output in the fugure. Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-04-28chipset: accidentally left the old IS_GEN7 macroBen Widawsky
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-04-25chipset updatesBen Widawsky
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-04-22tests: add gem_unfence_active_buffersDaniel Vetter
Unfortunately this requires slab poisoning to catch anything :( Also add a new helper to drmtest to get the available fence count. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-04-19lib: Fix render copy on gen2Chris Wilson
2012-04-12Use mmap64() for performing the GTT mappingChris Wilson
Although the address space for GTT mappings may only be 32-bits, we need to use the explicit 64-bit mmap interface so that on a 32-bit platform the offset we pass is not truncated to 31-bits. Fixes gem_mmap_offset_exhaustion on 32-bit platforms. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-04-10tests: rc6 residency testBen Widawsky
This is meant to test the sysfs entry for showing rc6 residency in milliseconds. Remember, sysfs is a permanent interface. v2: use new get_card interface to try "all" devices check rc6p and rc6pp in addition to rc6 v3: rename rc6_residency.c to sysfs_rc6_residency.c print better error messages skip test if rc6 isn't enabled v4: update to new sysfs names Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
2012-04-10drm/i915: extract card gettingBen Widawsky
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-03-29Make the assertions guarding syscalls (drmIoctl in particular) verboseChris Wilson
Currently all we see is gem_read: ret == 0 failed, where it would help to see the errno and/or the ret. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-03-22tests: adapt storedw tests to ppgttDaniel Vetter
MI_MEM_VIRTUAL actually means use global gtt now, not setting the bit means use ppgtt. On previous gens, not setting the bits ment 'use physical memory'. So what, the usual confusion. Note that for some odd reasong this is broken on gen6, but only on the bsd ring. Unexpected. Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-03-20tests: add gem_mmap_offset_exhaustionDaniel Vetter
This also adds a gem_madvise helper to lib/drmtest.c Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-02-28lib: Downgrade error for unknown 'swap' not 'ram'Chris Wilson
Oops, my mistake for copying a compile fix from another machine... If we can't detect how much RAM we have, 0 is not a suitable default, so keep the error for the time being and only downgrade the error for unknown swap. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-02-28lib: Downgrade error for failing to determine swap interface to a warningChris Wilson
If we can't detect how much swap is available, presume none. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-02-22tests/gem_ringfill: Exercise all ringsChris Wilson
On SandyBridge, the BLT commands were split from the RENDER commands as well as the BSD split inherited from Ironlake. So we need to make sure we do exercise each ring, and in order to do so we also need to make sure each batch takes longer to execute than it takes for us to submit it. v2: Exercise each ring sequentially. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-02-22intel_reg_dumper: Add dumping of GPU turbo regs.Eric Anholt
I was interested in finding why my IVB system is not getting GPU turbo after suspend/resume. The piece that looks weird to me is that INTERRUPT_THRESHOLD is sitting at 0, whereas pre-suspend it's 0x12000000.
2012-02-22instdone: Fix fallthroughs to invalid instdone bits on newer hardware.Eric Anholt
2012-02-22instdone: Add support for one of the IVB instdone regs.Eric Anholt
[danvet: added GAM and GAFM bits.]
2012-02-11lib/drmtest: fixup copy&paste printf format issueDaniel Vetter
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-02-11Remove pointless Android ifdefs for sys/fcntl.h.Kenneth Graunke
On my system, sys/fcntl.h contains exactly one line: #include <fcntl.h> So there's really no need to #ifdef it. Also, intel_mmio.c already included <fcntl.h>; there's no need to include it twice. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-02-10Added support for AndroidSateesh Kavuri
Added the Android.mk file as per Android make system. Also had to modify the headers with the proper location for fcntl.h as per the Android bionic headers location Signed-off-by: Sateesh Kavuri <sateesh.kavuri@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-02-09lib/rendercopy: fixup make distcheckDaniel Vetter
And complete the gem_stress->rendercopy rename that I've forgotten about. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-02-08Update generation checks to provide basic support for Ivybridge.Kenneth Graunke
There may be some updates required, but assuming Ivybridge is similar to Sandybridge is a decent start; previously it fell through to the Gen2/3 case and nothing worked. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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