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Add docs, rename parameter and rename the macro to igt_do_timeout to
make it clear it works like a loop.
v2: Rename instead to igt_until_timeout (Chris).
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
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- Give __ prefix to internal funcstion and structs, only
igt_interruptible is used by tests.
- Move docs to igt_interruptible and adjust.
- Explain more clearly how the timeout is getting doubled each
iteration until no more interruptions happen. Also rename the
argument to give it a more meaningful name in the docs.
- Link from other functions to this one for cross-referencing.
- Rename to igt_do_interruptible to make it clearer it's a loop,
inspired by do {} while () loops.
v2: Rename instead to igt_while_interruptible and fix typos (Chris).
And add gtk-doc for igt_ioctl, too.
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
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v2: Initially added Werror by default. Make it optional so it doesn't
break android build and (potential) distros maintaing the package
(Hinted by Damien Lespiau).
--enable-werror will enable -Werror compiler flag.
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
Acked-by: Damien Lespiau <damien.lespiau@intel.com>
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variable.
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
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dma-buf new API consists of:
- mmap(dma_buf_fd, ...): the ability to map a dma-buf file-descriptor of a
graphics buffer to the userspace, and more importantly, to actually write on
the mapped pointer (which was not possible before). It’s worth noting that the
Direct Rendering Manager (DRM) and the hardware driver implementation are
fundamentally important to safely export the graphics handle to be mapped.
- ioctl(dma_buf_fd, DMA_BUF_IOCTL_SYNC, &args): cache coherency management in
cases where the CPU and GPU devices are being accessed through dma-buf at the
same time. Coherency markers, which forward directly to existing dma-buf
device drivers vfunc hooks, are exposed to the userspace through the
DMA_BUF_IOCTL_SYNC ioctl and have to be used before and after the mapped area
is accessed. This is fundamentally important in hardware architectures where
the graphics engine and the CPU cores don't share caches but also important in
other type of hardware where the memory hierarchy is (most of the time)
coherent. More details can be found in this patch set:
http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=c11e391da2a8fe973c3c2398452000bed505851e
v2: use uint32_t for color type, increment the variable and add
--interactive-debug=paint
v3: use igt_display_commit() to mode set the crtc so the rectangle is shown
painted; also added Testcase description on the beginning of the file.
v4: remove crtc actually which seems superfluous; add a igt_skip_on in case
support for dma-buf mmap is nonexistent.
Signed-off-by: Tiago Vignatti <tiago.vignatti@intel.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
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Command parser version 7 introduces the ability to copy between
regsiters from the Haswell RCS with MI_LOAD_REGISTER_REG. This provides
a quick smoketest of that ability.
v2: Add some negative tests as well
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Check contention for context and object creation.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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So those subtests that require tiling don't cause unrelated subtests to
be skipped.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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After we inspect map[i], we must flush again before checking map[i] for
the xor pass.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Only do one mode of batch writing for BAT, and hope that is sufficient
to route out all the coherency problems when doing the cmdparser and
when not. We still have the full set for non-BAT, just less of a
smokescreen.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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On the CI machines, the coherency tests are flip-flopping on byt/bsw.
Undesirable as they should always fail (until we have a good w/a).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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This could happen when the selected pipe cannot be used with the connected
port due do HW constrains.
v2: Apply review comment (Marius)
bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86763
Signed-off-by: Gabriel Feceoru <gabriel.feceoru@intel.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
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When no display is connected all kms_plane subtests pass although
no testing is done.
Change it by reporting the subtests as skipped.
Signed-off-by: Gabriel Feceoru <gabriel.feceoru@intel.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
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One property lost in the expansion for various coherency checks was
ensuring that every time we overwrote the batch it had a unique value
(to ensure that the GPU was seeing the latest value).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Look at handling of multiple batches within the buffer and avoiding as
much synchronisation as possible.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Enable testing on all connectors that have the "scaling mode"
property set.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93012
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
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Switched from DRIVER_INTEL to DRIVER_ANY to enable test
on all hardware.
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
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Changed the DRM format to LOCAL_DRM_FORMAT_MOD_NONE since it
is hardware agnostic.
Also fixed formatting/tabs.
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
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ref_crc is never assigned or read, and can be safely
removed.
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
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pipe_crc in data_t is assigned an allocated memory space and
then later free'd. But it is never used for any comparisons.
It should therefore be safe to remove pipe_crc and the crc
requirement.
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
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Remove devid from data_t since it is never read.
Also remove one assignment to devid.
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
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Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93012
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
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We can simply sscanf the crc in one go. Also split up the igt asserts to
get better details about what went wrong.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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We'll be adding more context for the subtests than just the max
brightness.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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Gives out better diagnostics than just igt_asssert.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Avoid the second pair of full clflushes when setting up the batch.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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When using the kernel set-domain cache management, we need to set the
domain as appropriate for our pointer access. In this case we access the
buffer through a CPU mmap, and so we must request access via the CPU
domain.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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When looking at a pair of GPU writes, where we want to make sure that
the clean cacheline is invalidated automatically, we want to reuse that
cacheline whilst we know it remains valid (i.e. repeat the test using a
new value to the same location).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Since the value in the bo may be altered by the test, we only want to
repeat phases of the test to avoid breaking the test itself.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Add a requirement for mmap-wc so that failure on older kernels is explained.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Look at different cachelines on each pass, otherwise each group of 16
flush the same cachline.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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As a point of comparison, test the pread/pwrite interface as well.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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We can make the requirement testing and reporting tidier by using
igt_subtest_group.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Alternate between two values written by the GPU so that we can look for
stale cachelines without having to overwrite the value with the CPU.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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A basic check that the execbuf flushes writes from the batch and that
they are coherent afterwards.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Attempt to fill buffers using many clients working in parallel.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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igt_fork_hang_detector() was called from a igt_fixture block, while its
counterpart (igt_stop_hang_detector) was called normally, causing
SIGTERM to be sent when running under check target.
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
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Remember to skip using BSD on gen6, unless you want to kill the machine.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95134
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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This change mirrors the change in drm made by krh@redhat.com
on "Mon Apr 6 17:18:17 2009" on the drm branch intel_on_all_hw.
The assert(major < 1) is only needed for the legacy intel driver.
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Switched to assert helpers to enable better error output.
Signed-off-by: Robert Foss <robert.foss@collabora.com>
[tomeu: fix test of major version to be lte]
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Caught by check target.
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Marius Vlad <marius.c.vlad@intel.com>
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