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testdisplay.c:117:1: warning: comparison between signed and unsigned
integer expressions
testdisplay.c:125:1: warning: comparison between signed and unsigned
integer expressions
testdisplay.c:145:1: warning: comparison between signed and unsigned
integer expressions
testdisplay.c:1060:16: warning: comparison between signed and unsigned
integer expressions
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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This needs a properly pre-faulted dst bo.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Creating a zero-length bo should fail, so check that. Still run
the minimal batchbuffer, but without the zero-length reloc.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Hangs gen3 and simply writes garbage into the unmappable part of
gtt on gen4+, which might cause issues later on.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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It doesn't like it. Really.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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... instead of hanging the gpu.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Didn't catch any known bug, but can't hurt.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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v2: proper support for gen6+
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Using a dummy reloc that doesn't matter to trick the kernel into
synchroizing the rings.
v2: properly apply MI_NOOP workaround to MI_FLUSH_DW and
switch to MI_COND_BATCH_BUFFER_END as a dummy command on the
render ring to avoid PIPE_CONTROL errata.
v3: somebody clever decided that in C, you cound from 1,
i.e. I915_EXEC_RENDER == 1. It works now ...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Also start to shortly explain testcases with an easily-greppable
header like this:
/*
* Testcase:
*
* [Possible further explanation.]
*
*/
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Doesn't work.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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MI_*/PIPE_CONTROL writes need to be in DOMAIN_INSTRUCTION, because
that is what mesa uses and I plan to use this to work around a
gen6 ppgtt issue.
Also testing with intentionally b0rked GFX_MODE on my snb shows that
we need to increase the loop counter a bit to reliably hit the tlb
invalidation problem. Test still completes within a few seconds.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Previously, "make check" failed because the main() function was not
defined.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Add a couple of simple store dword tests to test memory coherence.
gem_storedw_loop simply executes a batch that continually stores an
incremented value to a target buffer object, checking the results after
each batch completes.
gem_storedw_batches_loop does the same thing, but creates a new command
batch buffer for each iteration, which can exercise the buffer creation
code. This test is based on one from Andrzej Kacprowski from Intel.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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Signed-off-by: Hai Lan <hai.lan@intel.com>
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Cc: Chris Wilson <chris@chris-wilson.co.uk>
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In other news: We've been missing a unmapping_mapping_range somewhere
in the kernel. But lazy me never came around to digging up the real
cause.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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For a TV device, there might be no preferred mode. In this case,
we can test the first mode.
Signed-off-by: Hai Lan <hai.lan@intel.com>
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Why, oh why, do these only become obvious after pushing upstream?
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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As signals cause the syscalls to be interrupted, we often need to clean
up partial state before returning to userspace. Often a source of
unamusing bugs, so encourage gem_stress to provoke them.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Triggers an OOPS with dmar enabled currently.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Test copying between 2 mappings and reading/writing from and to.
References: https://bugs.freedesktop.org/show_bug.cgi?id=38115
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Too noisy - which is an another way of saying too broken :(
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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I want to know how large these corruptions can get!
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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gem_stress -p1 is much more evil than gem_stress -c1, it also manages
to tear appart untiled workloads!
Now duct-taping over it still works (--apply-duct-tape) ... hm.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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gem_stress -c 1
... sometimes takes a while to hit a problem.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Just look for the ADDFB2 ioctl and enable the new code if it exists.
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Useful for testing tiled vs linear framebuffers.
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Enumerate available extra planes and try to use one on each CRTC we enable.
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When using testdisplay on GM965 and Pineview with LVDS, it will fail to
set a mode because the first unused crtc can't be used for LVDS. So
check the possible_crtcs to make sure the crtc can be used.
Signed-off-by: Hai Lan <hai.lan@intel.com>
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Without this height would be 16 with the minimal buffer size.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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This explains why gem_stress -u worked beforehand - the rendercpy
was not actually used!
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Creates funny rounding problems otherwise.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Remember the 3D pipeline is much more restricted than the BLT engine,
and we were feeding it buffers much larger than either the
render engine or the sampler could manager.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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...and allow for cpu maps!
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...even through a fence that can.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Gah, in my excitement of reproducing the failure reported by
gem_stress, I missed using fenced relocs for the BLT.
Fortunately, it doesn't affect the presence of the error.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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... and we have a winner: gen3_mixed_blits reproduces the issue Daniel
Vetter originally found. It seems clear that we have some incoherence
between the RENDER and BLT units on gen3 that no amount of MI_FLUSH can
hide. Hmmm....
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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gem_stress is unhappy with tiled render copies on gen3. This is a simple
little test to ensure that a set of pure copies with a working set
larger than the aperture are handled correctly.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Exercise a nasty corner-case in the reservation logic for the fence
accounting.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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