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With the header cleanup we can now give this header a suitable name,
since it now really only contains register access and other I/O
functions and assorted definitions.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Only include what the header itself needs. The big fish here is
intel-gpu-tools.h. More will follow.
One ugly thing removed here is the duplicated GEN6_TD_CTL #define, one
of which was broken.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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A dodgy kernel may miss printing out the ring registers leading to a
FPE.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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That's how the registers are named in the kernel defines.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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4 pieces of code were looking very similar. Let's factor out a common
function in the not so unlikely case we need to tweak that code.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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As the sysfs is almost always mounted and readable, we have a higher
success rate checking for our error state there than in debugfs.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Show the decoded HEAD value, as well as print the calculated head offset
per ringbuffer.
This will be superceded in the next commit, but that patch is way more
complicated than this one (read: error prone), so I want this here.
Example:
ringbuffer (blitter ring) at 0x00044000; HEAD points to: 0x00044950
v2: Actually make it work for all rings.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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The rest of igt has moved to kernel coding style. People had already
been not conforming with the existing formatting in error decode, so we
may as well fix it.
This addresses two primary issues, tabbing (remove spaces), and space
after function in function call. I may have missed some of the latter
since that was done by hand.
I have upcoming work in this file, and it was annoying me.
v2: Fix case alignment (Chris)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
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Whoops, someone added UTS_RELEASE with no newline before PCI ID which
upsets our naive parser.
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Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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A cut'n'paste error from gen2 apparently.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Usually some random stack garbage doesn't equal some other
random stack garbage, leading to the filename != path check
succeeding.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Note that a per-ring error decode state would make more sense - this
way we could better decode the ring head and tail. But our current
head tracking is already lame (we need the kernel to also dump the
ringbuffer head/tail first, not just acthd), so I didn't bother.
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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... instead of i965+ for almost everything that Intel is still selling.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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... and test for what we mean instead.
Reported-by: Diego Celix <dcelix@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Handy for multi-GPU systems where the IGFX may not be first.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Useful for feeding in compressed files from bugzilla:
$ bzcat /tmp/i915_error_state.bz | intel_error_decode | less
Next step would be to use gzfopen or bzfopen to automagically handle
compressed files...
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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A few of the tools can be performed post-mortem from a different system,
so it is useful to be able to compile those tools on those foreign
systems. Obviously, any program to interact with the PCI device or talk
to GEM will fail on a non-Intel system.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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A simple variant of intel_gpu_dump that explicitly handles parsing of
i915_error_state.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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