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2013-10-21intel_error_decode: Fix X/Y fence for gen2/3Chris Wilson
2013-08-07intel_error_decode: First try /sys/drm/card0/error for the error-stateChris Wilson
As the sysfs is almost always mounted and readable, we have a higher success rate checking for our error state there than in debugfs. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2013-07-16tools/inter_error_decode: decode for ctl and acthdMika Kuoppala
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-04-23intel_error_decode: HEAD stuffBen Widawsky
Show the decoded HEAD value, as well as print the calculated head offset per ringbuffer. This will be superceded in the next commit, but that patch is way more complicated than this one (read: error prone), so I want this here. Example: ringbuffer (blitter ring) at 0x00044000; HEAD points to: 0x00044950 v2: Actually make it work for all rings. Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-04-23intel_error_decode: Whitespacing fixBen Widawsky
The rest of igt has moved to kernel coding style. People had already been not conforming with the existing formatting in error decode, so we may as well fix it. This addresses two primary issues, tabbing (remove spaces), and space after function in function call. I may have missed some of the latter since that was done by hand. I have upcoming work in this file, and it was annoying me. v2: Fix case alignment (Chris) Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-02-04intel_error_decode: Don't barf on a malformed PCI ID lineChris Wilson
Whoops, someone added UTS_RELEASE with no newline before PCI ID which upsets our naive parser.
2012-10-10fix warn in intel_error_decode: ignoring return value of 'asprintf'Imre Deak
Signed-off-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-05-09intel_error_decode: Be more lax for whitespace around parsing PCI-IDChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-03-19decode: Use the correct start mask for gen3 fence registersChris Wilson
A cut'n'paste error from gen2 apparently. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2012-01-24intel_error_decode: fixup glibc free warningDaniel Vetter
Usually some random stack garbage doesn't equal some other random stack garbage, leading to the filename != path check succeeding. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-01-09tools/intel_error_decode: fixup new warningsDaniel Vetter
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-01-09tools/intel_error_decode: convert over to libdrm decoderDaniel Vetter
Note that a per-ring error decode state would make more sense - this way we could better decode the ring head and tail. But our current head tracking is already lame (we need the kernel to also dump the ringbuffer head/tail first, not just acthd), so I didn't bother. Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-21tools/intel_error_decode: decode gen4+ fencesDaniel Vetter
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-18intel/decode: print out chipset genDaniel Vetter
... instead of i965+ for almost everything that Intel is still selling. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-18tools/decode: don't move around the display register sectionDaniel Vetter
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-18tools/decode: don't forget to print the name of the last ringDaniel Vetter
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-17tools/decode: retain the ring nameDaniel Vetter
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-03-14Decode gen2/gen3 fences in the error_stateDaniel Vetter
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-02-14Remove confusing use of IS_9XXChris Wilson
... and test for what we mean instead. Reported-by: Diego Celix <dcelix@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-01error decode: Search for first i915_error_stateChris Wilson
Handy for multi-GPU systems where the IGFX may not be first. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-01-09error: Parse ring name before gtt_offsetChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-23error decode: print out class of chipset in the error reportChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-10error-decode: stdin is 0 not 1Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-01error-decode: Operate as a pipe and accept input from stdinChris Wilson
Useful for feeding in compressed files from bugzilla: $ bzcat /tmp/i915_error_state.bz | intel_error_decode | less Next step would be to use gzfopen or bzfopen to automagically handle compressed files... Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-22Decode PGTBL_ER for i965Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-08-25decode: Handle errors during parsing.Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-07-15error: Decode i915 PGTBL errorsChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-04-08Enable compilation on non-Intel, non-DRM systems.Chris Wilson
A few of the tools can be performed post-mortem from a different system, so it is useful to be able to compile those tools on those foreign systems. Obviously, any program to interact with the PCI device or talk to GEM will fail on a non-Intel system. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-03-04intel_error_decode: Pretty print i830 PGTBL_ERChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-02-12Add intel_error_decode.Chris Wilson
A simple variant of intel_gpu_dump that explicitly handles parsing of i915_error_state. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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