From 71874f4a52878caabe5c2ccd499bab41633fa156 Mon Sep 17 00:00:00 2001 From: Ville Syrjälä Date: Tue, 10 Jun 2014 21:28:10 +0300 Subject: tools: Add intel_iosf_sb_{read,write} tools MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add generic tools to poke at IOSF sideband. The user needs to manually specify SB port as well as the register. TODO: Maybe add symbolic names for the units? Would avoid having to trawl the docs for the magic hex value. Signed-off-by: Ville Syrjälä --- lib/intel_io.h | 2 ++ lib/intel_iosf.c | 14 ++++++++++ tools/Makefile.sources | 2 ++ tools/intel_iosf_sb_read.c | 62 +++++++++++++++++++++++++++++++++++++++++ tools/intel_iosf_sb_write.c | 67 +++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 147 insertions(+) create mode 100644 tools/intel_iosf_sb_read.c create mode 100644 tools/intel_iosf_sb_write.c diff --git a/lib/intel_io.h b/lib/intel_io.h index 78a6f4de..8293353c 100644 --- a/lib/intel_io.h +++ b/lib/intel_io.h @@ -50,6 +50,8 @@ uint32_t intel_dpio_reg_read(uint32_t reg, int phy); void intel_dpio_reg_write(uint32_t reg, uint32_t val, int phy); uint32_t intel_flisdsi_reg_read(uint32_t reg); void intel_flisdsi_reg_write(uint32_t reg, uint32_t val); +uint32_t intel_iosf_sb_read(uint32_t port, uint32_t reg); +void intel_iosf_sb_write(uint32_t port, uint32_t reg, uint32_t val); int intel_punit_read(uint8_t addr, uint32_t *val); int intel_punit_write(uint8_t addr, uint32_t val); diff --git a/lib/intel_iosf.c b/lib/intel_iosf.c index ca206389..2f1ef90c 100644 --- a/lib/intel_iosf.c +++ b/lib/intel_iosf.c @@ -173,3 +173,17 @@ void intel_flisdsi_reg_write(uint32_t reg, uint32_t val) { vlv_sideband_rw(IOSF_PORT_FLISDSI, SB_CRWRDA_NP, reg, &val); } + +uint32_t intel_iosf_sb_read(uint32_t port, uint32_t reg) +{ + uint32_t val; + + vlv_sideband_rw(port, SB_CRRDDA_NP, reg, &val); + + return val; +} + +void intel_iosf_sb_write(uint32_t port, uint32_t reg, uint32_t val) +{ + vlv_sideband_rw(port, SB_CRWRDA_NP, reg, &val); +} diff --git a/tools/Makefile.sources b/tools/Makefile.sources index 0f638458..c2535e78 100644 --- a/tools/Makefile.sources +++ b/tools/Makefile.sources @@ -8,6 +8,8 @@ bin_PROGRAMS = \ intel_gpu_top \ intel_gpu_time \ intel_gtt \ + intel_iosf_sb_read \ + intel_iosf_sb_write \ intel_opregion_decode \ intel_perf_counters \ intel_stepping \ diff --git a/tools/intel_iosf_sb_read.c b/tools/intel_iosf_sb_read.c new file mode 100644 index 00000000..216defea --- /dev/null +++ b/tools/intel_iosf_sb_read.c @@ -0,0 +1,62 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + */ + +#include +#include +#include +#include +#include +#include "intel_io.h" +#include "intel_chipset.h" + +static void usage(const char *name) +{ + printf("Warning : This program will work only on Valleyview\n" + "Usage: %s \n" + "\t port/reg : in 0xXXXX format\n", + name); +} + +int main(int argc, char *argv[]) +{ + uint32_t port, reg, val; + struct pci_device *dev = intel_get_pci_device(); + + if (argc != 3 || !IS_VALLEYVIEW(dev->device_id)) { + usage(argv[0]); + return 1; + } + + port = strtoul(argv[1], NULL, 16); + reg = strtoul(argv[2], NULL, 16); + + intel_register_access_init(dev, 0); + + val = intel_iosf_sb_read(port, reg); + printf("0x%02x/0x%04x : 0x%08x\n", port, reg, val); + + intel_register_access_fini(); + + return 0; +} diff --git a/tools/intel_iosf_sb_write.c b/tools/intel_iosf_sb_write.c new file mode 100644 index 00000000..0d3dea20 --- /dev/null +++ b/tools/intel_iosf_sb_write.c @@ -0,0 +1,67 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include +#include +#include +#include +#include +#include "intel_io.h" +#include "intel_chipset.h" + +static void usage(const char *name) +{ + printf("Warning : This program will work only on Valleyview\n" + "Usage: %s \n" + "\t port/reg/val : in 0xXXXX format\n", + name); +} + +int main(int argc, char** argv) +{ + uint32_t port, reg, val, tmp; + struct pci_device *dev = intel_get_pci_device(); + + if (argc != 4 || !IS_VALLEYVIEW(dev->device_id)) { + usage(argv[0]); + return 1; + } + + port = strtoul(argv[1], NULL, 16); + reg = strtoul(argv[2], NULL, 16); + val = strtoul(argv[3], NULL, 16); + + intel_register_access_init(dev, 0); + + tmp = intel_iosf_sb_read(port, reg); + printf("Value before: 0x%X\n", tmp); + + intel_iosf_sb_write(port, reg, val); + + tmp = intel_iosf_sb_read(port, reg); + printf("Value after: 0x%X\n", tmp); + + intel_register_access_fini(); + + return 0; +} -- cgit v1.2.3