1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
|
/*
* Copyright © 2016 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#include <time.h>
#include "igt.h"
IGT_TEST_DESCRIPTION("Basic check of ring<->ring write synchronisation.");
/*
* Testcase: Basic check of sync
*
* Extremely efficient at catching missed irqs
*/
static double gettime(void)
{
static clockid_t clock = -1;
struct timespec ts;
/* Stay on the same clock for consistency. */
if (clock != (clockid_t)-1) {
if (clock_gettime(clock, &ts))
goto error;
goto out;
}
#ifdef CLOCK_MONOTONIC_RAW
if (!clock_gettime(clock = CLOCK_MONOTONIC_RAW, &ts))
goto out;
#endif
#ifdef CLOCK_MONOTONIC_COARSE
if (!clock_gettime(clock = CLOCK_MONOTONIC_COARSE, &ts))
goto out;
#endif
if (!clock_gettime(clock = CLOCK_MONOTONIC, &ts))
goto out;
error:
igt_warn("Could not read monotonic time: %s\n",
strerror(errno));
igt_assert(0);
return 0;
out:
return ts.tv_sec + 1e-9*ts.tv_nsec;
}
static int has_engine(int fd, const struct intel_execution_engine *e)
{
uint32_t bbe = MI_BATCH_BUFFER_END;
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_exec_object2 exec;
int ret;
memset(&exec, 0, sizeof(exec));
exec.handle = gem_create(fd, 4096);
gem_write(fd, exec.handle, 0, &bbe, sizeof(bbe));
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = (uintptr_t)&exec;
execbuf.buffer_count = 1;
execbuf.flags = e->exec_id | e->flags;
ret = __gem_execbuf(fd, &execbuf);
gem_close(fd, exec.handle);
return ret;
}
static void
sync_ring(int fd, unsigned ring, int num_children)
{
unsigned engines[16];
const char *names[16];
int num_engines = 0;
if (ring == ~0u) {
const struct intel_execution_engine *e;
for (e = intel_execution_engines; e->name; e++) {
if (e->exec_id == 0)
continue;
if (has_engine(fd, e))
continue;
if (e->exec_id == I915_EXEC_BSD) {
int is_bsd2 = e->flags != 0;
if (gem_has_bsd2(fd) != is_bsd2)
continue;
}
names[num_engines] = e->name;
engines[num_engines++] = e->exec_id | e->flags;
if (num_engines == ARRAY_SIZE(engines))
break;
}
num_children *= num_engines;
} else {
gem_require_ring(fd, ring);
names[num_engines] = NULL;
engines[num_engines++] = ring;
}
intel_detect_and_clear_missed_interrupts(fd);
igt_fork(child, num_children) {
const uint32_t bbe = MI_BATCH_BUFFER_END;
struct drm_i915_gem_exec_object2 object;
struct drm_i915_gem_execbuffer2 execbuf;
double start, elapsed;
unsigned long cycles;
memset(&object, 0, sizeof(object));
object.handle = gem_create(fd, 4096);
gem_write(fd, object.handle, 0, &bbe, sizeof(bbe));
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = (uintptr_t)&object;
execbuf.buffer_count = 1;
execbuf.flags = engines[child % num_engines];
gem_execbuf(fd, &execbuf);
start = gettime();
cycles = 0;
do {
do {
gem_execbuf(fd, &execbuf);
gem_sync(fd, object.handle);
} while (++cycles & 1023);
} while ((elapsed = gettime() - start) < SLOW_QUICK(10, 1));
igt_info("%s%sompleted %ld cycles: %.3f us\n",
names[child % num_engines] ?: "",
names[child % num_engines] ? " c" : "C",
cycles, elapsed*1e6/cycles);
gem_close(fd, object.handle);
}
igt_waitchildren_timeout(20, NULL);
igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
}
igt_main
{
const struct intel_execution_engine *e;
const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
int fd = -1;
igt_skip_on_simulation();
igt_fixture
fd = drm_open_driver(DRIVER_INTEL);
for (e = intel_execution_engines; e->name; e++) {
igt_subtest_f("basic-%s", e->name)
sync_ring(fd, e->exec_id | e->flags, 1);
igt_subtest_f("forked-%s", e->name)
sync_ring(fd, e->exec_id | e->flags, ncpus);
}
igt_subtest("basic-all")
sync_ring(fd, ~0u, 1);
igt_subtest("forked-all")
sync_ring(fd, ~0u, ncpus);
igt_fixture
close(fd);
}
|
