1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
|
/*
* Copyright © 2012-2013 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*
* Authors:
* Daniel Vetter <daniel.vetter@ffwll.ch>
*
*/
/*
* Testcase: Check whether prime import/export works on the same device
*
* ... but with different fds, i.e. the wayland usecase.
*/
#include "igt.h"
#include <unistd.h>
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <fcntl.h>
#include <inttypes.h>
#include <errno.h>
#include <sys/stat.h>
#include <sys/ioctl.h>
#include <pthread.h>
#include "drm.h"
IGT_TEST_DESCRIPTION("Check whether prime import/export works on the same"
" device... but with different fds.");
#define BO_SIZE (16*1024)
static char counter;
volatile int pls_die = 0;
static void
check_bo(int fd1, uint32_t handle1, int fd2, uint32_t handle2)
{
char *ptr1, *ptr2;
int i;
ptr1 = gem_mmap__cpu(fd1, handle1, 0, BO_SIZE, PROT_READ | PROT_WRITE);
ptr2 = gem_mmap__cpu(fd2, handle2, 0, BO_SIZE, PROT_READ | PROT_WRITE);
gem_set_domain(fd1, handle1, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
gem_set_domain(fd2, handle2, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
/* check whether it's still our old object first. */
for (i = 0; i < BO_SIZE; i++) {
igt_assert(ptr1[i] == counter);
igt_assert(ptr2[i] == counter);
}
counter++;
memset(ptr1, counter, BO_SIZE);
igt_assert(memcmp(ptr1, ptr2, BO_SIZE) == 0);
munmap(ptr1, BO_SIZE);
munmap(ptr2, BO_SIZE);
}
static void test_with_fd_dup(void)
{
int fd1, fd2;
uint32_t handle, handle_import;
int dma_buf_fd1, dma_buf_fd2;
counter = 0;
fd1 = drm_open_driver(DRIVER_INTEL);
fd2 = drm_open_driver(DRIVER_INTEL);
handle = gem_create(fd1, BO_SIZE);
dma_buf_fd1 = prime_handle_to_fd(fd1, handle);
gem_close(fd1, handle);
dma_buf_fd2 = dup(dma_buf_fd1);
close(dma_buf_fd1);
handle_import = prime_fd_to_handle(fd2, dma_buf_fd2);
check_bo(fd2, handle_import, fd2, handle_import);
close(dma_buf_fd2);
check_bo(fd2, handle_import, fd2, handle_import);
close(fd1);
close(fd2);
}
static void test_with_two_bos(void)
{
int fd1, fd2;
uint32_t handle1, handle2, handle_import;
int dma_buf_fd;
counter = 0;
fd1 = drm_open_driver(DRIVER_INTEL);
fd2 = drm_open_driver(DRIVER_INTEL);
handle1 = gem_create(fd1, BO_SIZE);
handle2 = gem_create(fd1, BO_SIZE);
dma_buf_fd = prime_handle_to_fd(fd1, handle1);
handle_import = prime_fd_to_handle(fd2, dma_buf_fd);
close(dma_buf_fd);
gem_close(fd1, handle1);
dma_buf_fd = prime_handle_to_fd(fd1, handle2);
handle_import = prime_fd_to_handle(fd2, dma_buf_fd);
check_bo(fd1, handle2, fd2, handle_import);
gem_close(fd1, handle2);
close(dma_buf_fd);
check_bo(fd2, handle_import, fd2, handle_import);
close(fd1);
close(fd2);
}
static void test_with_one_bo_two_files(void)
{
int fd1, fd2;
uint32_t handle_import, handle_open, handle_orig, flink_name;
int dma_buf_fd1, dma_buf_fd2;
fd1 = drm_open_driver(DRIVER_INTEL);
fd2 = drm_open_driver(DRIVER_INTEL);
handle_orig = gem_create(fd1, BO_SIZE);
dma_buf_fd1 = prime_handle_to_fd(fd1, handle_orig);
flink_name = gem_flink(fd1, handle_orig);
handle_open = gem_open(fd2, flink_name);
dma_buf_fd2 = prime_handle_to_fd(fd2, handle_open);
handle_import = prime_fd_to_handle(fd2, dma_buf_fd2);
/* dma-buf self importing an flink bo should give the same handle */
igt_assert_eq_u32(handle_import, handle_open);
close(fd1);
close(fd2);
close(dma_buf_fd1);
close(dma_buf_fd2);
}
static void test_with_one_bo(void)
{
int fd1, fd2;
uint32_t handle, handle_import1, handle_import2, handle_selfimport;
int dma_buf_fd;
fd1 = drm_open_driver(DRIVER_INTEL);
fd2 = drm_open_driver(DRIVER_INTEL);
handle = gem_create(fd1, BO_SIZE);
dma_buf_fd = prime_handle_to_fd(fd1, handle);
handle_import1 = prime_fd_to_handle(fd2, dma_buf_fd);
check_bo(fd1, handle, fd2, handle_import1);
/* reimport should give us the same handle so that userspace can check
* whether it has that bo already somewhere. */
handle_import2 = prime_fd_to_handle(fd2, dma_buf_fd);
igt_assert_eq_u32(handle_import1, handle_import2);
/* Same for re-importing on the exporting fd. */
handle_selfimport = prime_fd_to_handle(fd1, dma_buf_fd);
igt_assert_eq_u32(handle, handle_selfimport);
/* close dma_buf, check whether nothing disappears. */
close(dma_buf_fd);
check_bo(fd1, handle, fd2, handle_import1);
gem_close(fd1, handle);
check_bo(fd2, handle_import1, fd2, handle_import1);
/* re-import into old exporter */
dma_buf_fd = prime_handle_to_fd(fd2, handle_import1);
/* but drop all references to the obj in between */
gem_close(fd2, handle_import1);
handle = prime_fd_to_handle(fd1, dma_buf_fd);
handle_import1 = prime_fd_to_handle(fd2, dma_buf_fd);
check_bo(fd1, handle, fd2, handle_import1);
/* Completely rip out exporting fd. */
close(fd1);
check_bo(fd2, handle_import1, fd2, handle_import1);
}
static void *thread_fn_reimport_vs_close(void *p)
{
struct drm_gem_close close_bo;
int *fds = p;
int fd = fds[0];
int dma_buf_fd = fds[1];
uint32_t handle;
while (!pls_die) {
handle = prime_fd_to_handle(fd, dma_buf_fd);
close_bo.handle = handle;
ioctl(fd, DRM_IOCTL_GEM_CLOSE, &close_bo);
}
return (void *)0;
}
static void test_reimport_close_race(void)
{
pthread_t *threads;
int r, i, num_threads;
int fds[2];
int obj_count;
void *status;
uint32_t handle;
int fake;
/* Allocate exit handler fds in here so that we dont screw
* up the counts */
fake = drm_open_driver(DRIVER_INTEL);
obj_count = igt_get_stable_obj_count(fake);
num_threads = sysconf(_SC_NPROCESSORS_ONLN);
threads = calloc(num_threads, sizeof(pthread_t));
fds[0] = drm_open_driver(DRIVER_INTEL);
handle = gem_create(fds[0], BO_SIZE);
fds[1] = prime_handle_to_fd(fds[0], handle);
for (i = 0; i < num_threads; i++) {
r = pthread_create(&threads[i], NULL,
thread_fn_reimport_vs_close,
(void *)(uintptr_t)fds);
igt_assert_eq(r, 0);
}
sleep(5);
pls_die = 1;
for (i = 0; i < num_threads; i++) {
pthread_join(threads[i], &status);
igt_assert(status == 0);
}
close(fds[0]);
close(fds[1]);
obj_count = igt_get_stable_obj_count(fake) - obj_count;
igt_info("leaked %i objects\n", obj_count);
close(fake);
igt_assert_eq(obj_count, 0);
}
static void *thread_fn_export_vs_close(void *p)
{
struct drm_prime_handle prime_h2f;
struct drm_gem_close close_bo;
int fd = (uintptr_t)p;
uint32_t handle;
while (!pls_die) {
/* We want to race gem close against prime export on handle one.*/
handle = gem_create(fd, 4096);
if (handle != 1)
gem_close(fd, handle);
/* raw ioctl since we expect this to fail */
/* WTF: for gem_flink_race I've unconditionally used handle == 1
* here, but with prime it seems to help a _lot_ to use
* something more random. */
prime_h2f.handle = 1;
prime_h2f.flags = DRM_CLOEXEC;
prime_h2f.fd = -1;
ioctl(fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &prime_h2f);
close_bo.handle = 1;
ioctl(fd, DRM_IOCTL_GEM_CLOSE, &close_bo);
close(prime_h2f.fd);
}
return (void *)0;
}
static void test_export_close_race(void)
{
pthread_t *threads;
int r, i, num_threads;
int fd;
int obj_count;
void *status;
int fake;
num_threads = sysconf(_SC_NPROCESSORS_ONLN);
threads = calloc(num_threads, sizeof(pthread_t));
/* Allocate exit handler fds in here so that we dont screw
* up the counts */
fake = drm_open_driver(DRIVER_INTEL);
obj_count = igt_get_stable_obj_count(fake);
fd = drm_open_driver(DRIVER_INTEL);
for (i = 0; i < num_threads; i++) {
r = pthread_create(&threads[i], NULL,
thread_fn_export_vs_close,
(void *)(uintptr_t)fd);
igt_assert_eq(r, 0);
}
sleep(5);
pls_die = 1;
for (i = 0; i < num_threads; i++) {
pthread_join(threads[i], &status);
igt_assert(status == 0);
}
close(fd);
obj_count = igt_get_stable_obj_count(fake) - obj_count;
igt_info("leaked %i objects\n", obj_count);
close(fake);
igt_assert_eq(obj_count, 0);
}
static void test_llseek_size(void)
{
int fd, i;
uint32_t handle;
int dma_buf_fd;
counter = 0;
fd = drm_open_driver(DRIVER_INTEL);
for (i = 0; i < 10; i++) {
int bufsz = 4096 << i;
handle = gem_create(fd, bufsz);
dma_buf_fd = prime_handle_to_fd(fd, handle);
gem_close(fd, handle);
igt_assert(prime_get_size(dma_buf_fd) == bufsz);
close(dma_buf_fd);
}
close(fd);
}
static void test_llseek_bad(void)
{
int fd;
uint32_t handle;
int dma_buf_fd;
counter = 0;
fd = drm_open_driver(DRIVER_INTEL);
handle = gem_create(fd, BO_SIZE);
dma_buf_fd = prime_handle_to_fd(fd, handle);
gem_close(fd, handle);
igt_require(lseek(dma_buf_fd, 0, SEEK_END) >= 0);
igt_assert(lseek(dma_buf_fd, -1, SEEK_END) == -1 && errno == EINVAL);
igt_assert(lseek(dma_buf_fd, 1, SEEK_SET) == -1 && errno == EINVAL);
igt_assert(lseek(dma_buf_fd, BO_SIZE, SEEK_SET) == -1 && errno == EINVAL);
igt_assert(lseek(dma_buf_fd, BO_SIZE + 1, SEEK_SET) == -1 && errno == EINVAL);
igt_assert(lseek(dma_buf_fd, BO_SIZE - 1, SEEK_SET) == -1 && errno == EINVAL);
close(dma_buf_fd);
close(fd);
}
igt_main
{
struct {
const char *name;
void (*fn)(void);
} tests[] = {
{ "basic-with_one_bo", test_with_one_bo },
{ "basic-with_one_bo_two_files", test_with_one_bo_two_files },
{ "basic-with_two_bos", test_with_two_bos },
{ "basic-with_fd_dup", test_with_fd_dup },
{ "export-vs-gem_close-race", test_export_close_race },
{ "reimport-vs-gem_close-race", test_reimport_close_race },
{ "basic-llseek-size", test_llseek_size },
{ "basic-llseek-bad", test_llseek_bad },
};
int i;
for (i = 0; i < ARRAY_SIZE(tests); i++) {
igt_subtest(tests[i].name)
tests[i].fn();
}
}
|