<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/mips/netlogic, branch master</title>
<subtitle>Linux Kernel</subtitle>
<id>https://git.etezian.org/cgit.cgi/linux.git/atom?h=master</id>
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<updated>2016-12-25T10:04:12+00:00</updated>
<entry>
<title>clocksource: Use a plain u64 instead of cycle_t</title>
<updated>2016-12-25T10:04:12+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2016-12-21T19:32:01+00:00</published>
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<id>urn:sha1:a5a1d1c2914b5316924c7893eb683a5420ebd3be</id>
<content type='text'>
There is no point in having an extra type for extra confusion. u64 is
unambiguous.

Conversion was done with the following coccinelle script:

@rem@
@@
-typedef u64 cycle_t;

@fix@
typedef cycle_t;
@@
-cycle_t
+u64

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: John Stultz &lt;john.stultz@linaro.org&gt;
</content>
</entry>
<entry>
<title>dma-mapping: use unsigned long for dma_attrs</title>
<updated>2016-08-04T12:50:07+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>k.kozlowski@samsung.com</email>
</author>
<published>2016-08-03T20:46:00+00:00</published>
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<id>urn:sha1:00085f1efa387a8ce100e3734920f7639c80caa3</id>
<content type='text'>
The dma-mapping core and the implementations do not change the DMA
attributes passed by pointer.  Thus the pointer can point to const data.
However the attributes do not have to be a bitfield.  Instead unsigned
long will do fine:

1. This is just simpler.  Both in terms of reading the code and setting
   attributes.  Instead of initializing local attributes on the stack
   and passing pointer to it to dma_set_attr(), just set the bits.

2. It brings safeness and checking for const correctness because the
   attributes are passed by value.

Semantic patches for this change (at least most of them):

    virtual patch
    virtual context

    @r@
    identifier f, attrs;

    @@
    f(...,
    - struct dma_attrs *attrs
    + unsigned long attrs
    , ...)
    {
    ...
    }

    @@
    identifier r.f;
    @@
    f(...,
    - NULL
    + 0
     )

and

    // Options: --all-includes
    virtual patch
    virtual context

    @r@
    identifier f, attrs;
    type t;

    @@
    t f(..., struct dma_attrs *attrs);

    @@
    identifier r.f;
    @@
    f(...,
    - NULL
    + 0
     )

Link: http://lkml.kernel.org/r/1468399300-5399-2-git-send-email-k.kozlowski@samsung.com
Signed-off-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Acked-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Acked-by: Robin Murphy &lt;robin.murphy@arm.com&gt;
Acked-by: Hans-Christian Noren Egtvedt &lt;egtvedt@samfundet.no&gt;
Acked-by: Mark Salter &lt;msalter@redhat.com&gt; [c6x]
Acked-by: Jesper Nilsson &lt;jesper.nilsson@axis.com&gt; [cris]
Acked-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt; [drm]
Reviewed-by: Bart Van Assche &lt;bart.vanassche@sandisk.com&gt;
Acked-by: Joerg Roedel &lt;jroedel@suse.de&gt; [iommu]
Acked-by: Fabien Dessenne &lt;fabien.dessenne@st.com&gt; [bdisp]
Reviewed-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt; [vb2-core]
Acked-by: David Vrabel &lt;david.vrabel@citrix.com&gt; [xen]
Acked-by: Konrad Rzeszutek Wilk &lt;konrad.wilk@oracle.com&gt; [xen swiotlb]
Acked-by: Joerg Roedel &lt;jroedel@suse.de&gt; [iommu]
Acked-by: Richard Kuo &lt;rkuo@codeaurora.org&gt; [hexagon]
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt; [m68k]
Acked-by: Gerald Schaefer &lt;gerald.schaefer@de.ibm.com&gt; [s390]
Acked-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Acked-by: Hans-Christian Noren Egtvedt &lt;egtvedt@samfundet.no&gt; [avr32]
Acked-by: Vineet Gupta &lt;vgupta@synopsys.com&gt; [arc]
Acked-by: Robin Murphy &lt;robin.murphy@arm.com&gt; [arm64 and dma-iommu]
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Define &amp; use CP0_EBase bit definitions</title>
<updated>2016-05-13T13:30:25+00:00</updated>
<author>
<name>James Hogan</name>
<email>james.hogan@imgtec.com</email>
</author>
<published>2016-05-11T12:50:49+00:00</published>
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<id>urn:sha1:37af2f3077d9202f8f8d17f453c91c9d08e11c76</id>
<content type='text'>
Add definitions for the bits &amp; fields in the CP0_EBase register, and use
them from a few different places in arch/mips which hardcoded these
values.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: Jayachandran C &lt;jchandra@broadcom.com&gt;
Cc: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
Cc: Radim Krčmář &lt;rkrcmar@redhat.com&gt;
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13222/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Netlogic: Fix CP0_EBASE redefinition warnings</title>
<updated>2016-05-09T10:00:05+00:00</updated>
<author>
<name>James Hogan</name>
<email>james.hogan@imgtec.com</email>
</author>
<published>2016-04-28T16:06:16+00:00</published>
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<id>urn:sha1:32eb6e8bee147b45e5e59230630d59541ccbb6e5</id>
<content type='text'>
A couple of netlogic assembly files define CP0_EBASE to $15, the same as
CP0_PRID in mipsregs.h, and use it for accessing both CP0_PRId and
CP0_EBase registers. However commit 609cf6f2291a ("MIPS: CPS: Early
debug using an ns16550-compatible UART") added a different definition of
CP0_EBASE to mipsregs.h, which included a register select of 1. This
causes harmless build warnings like the following:

  arch/mips/netlogic/common/reset.S:53:0: warning: "CP0_EBASE" redefined
  #define CP0_EBASE $15
  ^
  In file included from arch/mips/netlogic/common/reset.S:41:0:
  ./arch/mips/include/asm/mipsregs.h:63:0: note: this is the location of the previous definition
  #define CP0_EBASE $15, 1
  ^

Update the code to use the definitions from mipsregs.h for accessing
both registers.

Fixes: 609cf6f2291a ("MIPS: CPS: Early debug using an ns16550-compatible UART")
Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Acked-by: Jayachandran C &lt;jchandra@broadcom.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13183/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Make MIPS_CMDLINE_DTB default</title>
<updated>2015-11-11T07:38:37+00:00</updated>
<author>
<name>Jonas Gorski</name>
<email>jogo@openwrt.org</email>
</author>
<published>2015-10-12T11:13:03+00:00</published>
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<id>urn:sha1:2bcef9b457bbe159a5e3843e2578d8195e0b1c56</id>
<content type='text'>
Seval of-enabled machines (bmips, lantiq, xlp, pistachio, ralink) copied
the arguments from dtb to arcs_command_line to prevent the kernel from
overwriting them.

Since there is now an option to keep the dtb arguments, default to the
new option remove the "backup" to arcs_command_line in case of USE_OF is
enabled, except for those platforms that still take the bootloader
arguments or do not use any at all.

Signed-off-by: Jonas Gorski &lt;jogo@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Cc: Kevin Cernekee &lt;cernekee@gmail.com&gt;
Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Cc: Zubair Lutfullah Kakakhel &lt;Zubair.Kakakhel@imgtec.com&gt;
Cc: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: Ganesan Ramalingam &lt;ganesanr@broadcom.com&gt;
Cc: Jayachandran C &lt;jchandra@broadcom.com&gt;
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: James Hartley &lt;james.hartley@imgtec.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/11285/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>genirq: Remove irq argument from irq flow handlers</title>
<updated>2015-09-16T13:47:51+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2015-09-14T08:42:37+00:00</published>
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<id>urn:sha1:bd0b9ac405e1794d72533c3d487aa65b6b955a0c</id>
<content type='text'>
Most interrupt flow handlers do not use the irq argument. Those few
which use it can retrieve the irq number from the irq descriptor.

Remove the argument.

Search and replace was done with coccinelle and some extra helper
scripts around it. Thanks to Julia for her help!

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Julia Lawall &lt;Julia.Lawall@lip6.fr&gt;
Cc: Jiang Liu &lt;jiang.liu@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>dma-mapping: consolidate dma_{alloc,free}_{attrs,coherent}</title>
<updated>2015-09-10T20:29:01+00:00</updated>
<author>
<name>Christoph Hellwig</name>
<email>hch@lst.de</email>
</author>
<published>2015-09-09T22:39:39+00:00</published>
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<id>urn:sha1:6894258eda2f9badc28c878086c0e54bd5b7fb30</id>
<content type='text'>
Since 2009 we have a nice asm-generic header implementing lots of DMA API
functions for architectures using struct dma_map_ops, but unfortunately
it's still missing a lot of APIs that all architectures still have to
duplicate.

This series consolidates the remaining functions, although we still need
arch opt outs for two of them as a few architectures have very
non-standard implementations.

This patch (of 5):

The coherent DMA allocator works the same over all architectures supporting
dma_map operations.

This patch consolidates them and converges the minor differences:

 - the debug_dma helpers are now called from all architectures, including
   those that were previously missing them
 - dma_alloc_from_coherent and dma_release_from_coherent are now always
   called from the generic alloc/free routines instead of the ops
   dma-mapping-common.h always includes dma-coherent.h to get the defintions
   for them, or the stubs if the architecture doesn't support this feature
 - checks for -&gt;alloc / -&gt;free presence are removed.  There is only one
   magic instead of dma_map_ops without them (mic_dma_ops) and that one
   is x86 only anyway.

Besides that only x86 needs special treatment to replace a default devices
if none is passed and tweak the gfp_flags.  An optional arch hook is provided
for that.

[linux@roeck-us.net: fix build]
[jcmvbkbc@gmail.com: fix xtensa]
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Cc: Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;
Cc: Michal Simek &lt;monstr@monstr.eu&gt;
Cc: Jonas Bonn &lt;jonas@southpole.se&gt;
Cc: Chris Metcalf &lt;cmetcalf@ezchip.com&gt;
Cc: Guan Xuetao &lt;gxt@mprc.pku.edu.cn&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: Ingo Molnar &lt;mingo@elte.hu&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: "H. Peter Anvin" &lt;hpa@zytor.com&gt;
Cc: Andy Shevchenko &lt;andy.shevchenko@gmail.com&gt;
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Netlogic: Fix 0x0x prefixes.</title>
<updated>2015-09-03T10:08:05+00:00</updated>
<author>
<name>Antonio Ospite</name>
<email>ao2@ao2.it</email>
</author>
<published>2015-04-28T11:11:25+00:00</published>
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<id>urn:sha1:23eb6f4016758b756b54704b359e3c51d425d6ab</id>
<content type='text'>
Fix the 0x0x prefix in integer constants, in this case the registers
interval is actually 0x8065 .. 0x80A4 as confirmed some lines above in
the code.

Signed-off-by: Antonio Ospite &lt;ao2@ao2.it&gt;
Cc: linux-mips@linux-mips.org
Cc: Jiri Kosina &lt;trivial@kernel.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/9908/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Netlogic: NAND IRQ mapping</title>
<updated>2015-09-03T10:08:04+00:00</updated>
<author>
<name>Subhendu Sekhar Behera</name>
<email>sbehera@broadcom.com</email>
</author>
<published>2015-08-01T12:14:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.etezian.org/cgit.cgi/linux.git/commit/?id=8c576912e4708144cbaa28228cc910746f39bafd'/>
<id>urn:sha1:8c576912e4708144cbaa28228cc910746f39bafd</id>
<content type='text'>
Add NAND IRQ mapping for XLP9xx processor.

Signed-off-by: Subhendu Sekhar Behera &lt;sbehera@broadcom.com&gt;
Signed-off-by: Jayachandran C &lt;jchandra@broadcom.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10820/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Netlogic: Use chip_data for irq_chip methods</title>
<updated>2015-09-03T10:08:03+00:00</updated>
<author>
<name>Kamlakant Patel</name>
<email>kamlakant.patel@broadcom.com</email>
</author>
<published>2015-08-01T12:14:20+00:00</published>
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<id>urn:sha1:325f0a1833c41d2d399fda161866923b72592cc9</id>
<content type='text'>
Update mips/netlogic/common/irq.c and mips/pci/msi-xlp.c to use chip_data
to store interrupt controller data pointer. It uses handler_data now,
and that causes errors when an API (like the GPIO subsystem) tries to
use the handler data.

Signed-off-by: Kamlakant Patel &lt;kamlakant.patel@broadcom.com&gt;
Signed-off-by: Jayachandran C &lt;jchandra@broadcom.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10817/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
