<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/clk/Kconfig, branch master</title>
<subtitle>Linux Kernel</subtitle>
<id>https://git.etezian.org/cgit.cgi/linux.git/atom?h=master</id>
<link rel='self' href='https://git.etezian.org/cgit.cgi/linux.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.etezian.org/cgit.cgi/linux.git/'/>
<updated>2016-11-02T00:33:13+00:00</updated>
<entry>
<title>clk: Enable compile testing for s2mps11 and max77686</title>
<updated>2016-11-02T00:33:13+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzk@kernel.org</email>
</author>
<published>2016-10-02T20:58:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.etezian.org/cgit.cgi/linux.git/commit/?id=9c1b305c1e8c8d5dcdb06909a15eb0df69cff45f'/>
<id>urn:sha1:9c1b305c1e8c8d5dcdb06909a15eb0df69cff45f</id>
<content type='text'>
s2mps11 and max77686 clock drivers can be compile tested to increase
build coverage.

Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: uniphier: add core support code for UniPhier clock driver</title>
<updated>2016-09-16T23:31:33+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-09-16T07:40:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.etezian.org/cgit.cgi/linux.git/commit/?id=734d82f4a678e897a3197b3e61313e32c9e77f46'/>
<id>urn:sha1:734d82f4a678e897a3197b3e61313e32c9e77f46</id>
<content type='text'>
This includes UniPhier clock driver code, except SoC-specific
data arrays.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: mediatek: Refine the makefile to support multiple clock drivers</title>
<updated>2016-08-19T19:18:38+00:00</updated>
<author>
<name>James Liao</name>
<email>jamesjj.liao@mediatek.com</email>
</author>
<published>2016-08-19T05:34:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.etezian.org/cgit.cgi/linux.git/commit/?id=2886c84681c4a10a8fecdea58bf749af09406a33'/>
<id>urn:sha1:2886c84681c4a10a8fecdea58bf749af09406a33</id>
<content type='text'>
Add a Kconfig to define clock configuration for each SoC, and
modify the Makefile to build drivers that only selected in config.

Signed-off-by: Shunli Wang &lt;shunli.wang@mediatek.com&gt;
Signed-off-by: James Liao &lt;jamesjj.liao@mediatek.com&gt;
Signed-off-by: Erin Lo &lt;erin.lo@mediatek.com&gt;
Tested-by: John Crispin &lt;blogic@openwrt.org&gt;
Reviewed-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: max77686: Add support for MAX77620 clocks</title>
<updated>2016-08-15T22:39:32+00:00</updated>
<author>
<name>Laxman Dewangan</name>
<email>ldewangan@nvidia.com</email>
</author>
<published>2016-06-17T10:51:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.etezian.org/cgit.cgi/linux.git/commit/?id=5a227cd1ab3693d36ac7a6f1fc4e21a7129f62f0'/>
<id>urn:sha1:5a227cd1ab3693d36ac7a6f1fc4e21a7129f62f0</id>
<content type='text'>
Maxim Max77620 has one 32KHz clock output and the clock HW
IP used on this PMIC is same as what it is there in the MAX77686.

Add clock driver support for MAX77620 on the MAX77686 driver.

CC: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
CC: Javier Martinez Canillas &lt;javier@dowhile0.org&gt;
Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Tested-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Reviewed-by: Javier Martinez Canillas &lt;javier@osg.samsung.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: max77686: Combine Maxim max77686 and max77802 driver</title>
<updated>2016-08-15T22:32:41+00:00</updated>
<author>
<name>Laxman Dewangan</name>
<email>ldewangan@nvidia.com</email>
</author>
<published>2016-06-17T10:51:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.etezian.org/cgit.cgi/linux.git/commit/?id=8ad313fe4e0016bac5dc6a7fbb323b8551977bd9'/>
<id>urn:sha1:8ad313fe4e0016bac5dc6a7fbb323b8551977bd9</id>
<content type='text'>
The clock IP used on the Maxim PMICs max77686 and max77802 are
same. The configuration of clock register is also same except
the number of clocks.

Part of common code utilisation, there is 3 files for these chips
clock driver, one for common and two files for driver registration.

Combine both drivers into single file and move common code into
same common file reduces the 2 files and make max77686 and max77802
clock driver in single fine. This driver does not depends on the
parent driver structure. The regmap handle is acquired through
regmap APIs for the register access.

This combination of driver helps on adding clock driver for different
Maxim PMICs which has similar clock IP like MAX77620 and MAX20024.

Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
CC: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
CC: Javier Martinez Canillas &lt;javier@dowhile0.org&gt;
Reviewed-by: Javier Martinez Canillas &lt;javier@osg.samsung.com&gt;
Tested-by: Javier Martinez Canillas &lt;javier@osg.samsung.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Tested-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: oxnas: Add hardware dependencies</title>
<updated>2016-07-12T22:31:21+00:00</updated>
<author>
<name>Jean Delvare</name>
<email>jdelvare@suse.de</email>
</author>
<published>2016-07-07T07:18:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.etezian.org/cgit.cgi/linux.git/commit/?id=821f9946e07b7b201fe4581bd5f6005d84b7bd42'/>
<id>urn:sha1:821f9946e07b7b201fe4581bd5f6005d84b7bd42</id>
<content type='text'>
The clk-oxnas driver is specific to its architecture, so do not
propose it on other architectures, unless build-testing.

Signed-off-by: Jean Delvare &lt;jdelvare@suse.de&gt;
Cc: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Acked-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
Link: lkml.kernel.org/r/20160707091844.196a7930@endymion
</content>
</entry>
<entry>
<title>Merge branch 'clk-sunxi-ng' into clk-next</title>
<updated>2016-07-09T01:08:56+00:00</updated>
<author>
<name>Michael Turquette</name>
<email>mturquette@baylibre.com</email>
</author>
<published>2016-07-09T01:08:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.etezian.org/cgit.cgi/linux.git/commit/?id=7adb76956189d10fd77f00b41b4d413480e94715'/>
<id>urn:sha1:7adb76956189d10fd77f00b41b4d413480e94715</id>
<content type='text'>
</content>
</entry>
<entry>
<title>clk: sunxi-ng: Add common infrastructure</title>
<updated>2016-07-09T01:04:32+00:00</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2016-06-29T19:05:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.etezian.org/cgit.cgi/linux.git/commit/?id=1d80c14248d6082c91a8a9e3d70cc94c3cc18ecb'/>
<id>urn:sha1:1d80c14248d6082c91a8a9e3d70cc94c3cc18ecb</id>
<content type='text'>
Start our new clock infrastructure by adding the registration code, common
structure and common code.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
Link: lkml.kernel.org/r/20160629190535.11855-3-maxime.ripard@free-electrons.com
</content>
</entry>
<entry>
<title>clk: Kconfig: Name RK818 in Kconfig for COMMON_CLK_RK808</title>
<updated>2016-07-06T22:20:32+00:00</updated>
<author>
<name>Wadim Egorov</name>
<email>w.egorov@phytec.de</email>
</author>
<published>2016-06-02T06:50:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.etezian.org/cgit.cgi/linux.git/commit/?id=cb98fd5d4da192cf2bf3fceddcc3bc9e59a22598'/>
<id>urn:sha1:cb98fd5d4da192cf2bf3fceddcc3bc9e59a22598</id>
<content type='text'>
The RK808 and RK818 PMICs are using a similar register map.
We can reuse the clk driver for the RK818 PMIC. So let's add
the RK818 in the Kconfig description.

Signed-off-by: Wadim Egorov &lt;w.egorov@phytec.de&gt;
Acked-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
Link: lkml.kernel.org/r/1464850228-17244-4-git-send-email-w.egorov@phytec.de
</content>
</entry>
<entry>
<title>Merge remote-tracking branch 'clk/clk-s905' into clk-next</title>
<updated>2016-06-23T01:20:12+00:00</updated>
<author>
<name>Michael Turquette</name>
<email>mturquette@baylibre.com</email>
</author>
<published>2016-06-23T01:20:12+00:00</published>
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<id>urn:sha1:367b30502d0717eb063d47112eb154076d479d92</id>
<content type='text'>
</content>
</entry>
</feed>
