<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/drivers/clk/bcm/Makefile, branch master</title>
<subtitle>Linux Kernel</subtitle>
<id>https://git.etezian.org/cgit.cgi/linux.git/atom?h=master</id>
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<updated>2016-09-16T23:31:29+00:00</updated>
<entry>
<title>clk: bcm: Add driver for BCM53573 ILP clock</title>
<updated>2016-09-16T23:31:29+00:00</updated>
<author>
<name>Rafał Miłecki</name>
<email>rafal@milecki.pl</email>
</author>
<published>2016-09-13T07:06:04+00:00</published>
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<id>urn:sha1:bd8dd593f7d2211f2273e05741d157b0c8d020ae</id>
<content type='text'>
This clock is present on BCM53573 devices (including BCM47189) that use
Cortex-A7. ILP is a part of PMU (Power Management Unit) multi-function
device so we use syscon (and regmap) for it.

Signed-off-by: Rafał Miłecki &lt;rafal@milecki.pl&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
[sboyd@codeaurora.org: Remove 0 from clk_init_data to silence sparse]
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: iproc: Make clocks visible options</title>
<updated>2016-09-15T00:21:47+00:00</updated>
<author>
<name>Jon Mason</name>
<email>jonmason@broadcom.com</email>
</author>
<published>2015-10-29T20:44:10+00:00</published>
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<id>urn:sha1:f4e871509959b77debcac8f0dcbad85d6dbde06e</id>
<content type='text'>
Make the clocks visible options that can be selected by anyone.  This
avoids the problems of:
 1) Select is a reverse dependency and is hard for people to understand
    and can sometimes be a pain to track down
 2) Build coverage goes down because configs are hidden
 3) Code bloat

Patch suggested by Stephen Boyd

Signed-off-by: Jon Mason &lt;jonmason@broadcom.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'clk-bcm2835' into clk-next</title>
<updated>2015-12-23T00:49:38+00:00</updated>
<author>
<name>Michael Turquette</name>
<email>mturquette@baylibre.com</email>
</author>
<published>2015-12-23T00:49:38+00:00</published>
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<id>urn:sha1:ce6dd266d535d66ac90abdd0241e7e5be4890568</id>
<content type='text'>
</content>
</entry>
<entry>
<title>clk: bcm2835: Add a driver for the auxiliary peripheral clock gates.</title>
<updated>2015-12-23T00:47:17+00:00</updated>
<author>
<name>Eric Anholt</name>
<email>eric@anholt.net</email>
</author>
<published>2015-12-15T23:35:58+00:00</published>
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<id>urn:sha1:5e63dcc74b3066659ea53aeefbee1fc1d79f4b6f</id>
<content type='text'>
There are a pair of SPI masters and a mini UART that were last minute
additions.  As a result, they didn't get integrated in the same way as
the other gates off of the VPU clock in CPRMAN.

Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
</content>
</entry>
<entry>
<title>clk: bcm: Add BCM63138 clock support</title>
<updated>2015-11-20T23:46:27+00:00</updated>
<author>
<name>Florian Fainelli</name>
<email>f.fainelli@gmail.com</email>
</author>
<published>2015-10-30T01:23:18+00:00</published>
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<id>urn:sha1:addc3ba666fc5439a05f33263cc52f2c3f77af15</id>
<content type='text'>
BCM63138 has a simple clocking domain which is primarily the ARMPLL
clocking complex, from which the ARM (CPU), APB and AXI clocks would be
derived from.

Since the ARMPLL controller is entirely compatible with the iProc ARM
PLL, we just initialize it without additional parameters.

Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'clk-iproc' into clk-next</title>
<updated>2015-10-22T00:28:19+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2015-10-22T00:28:19+00:00</published>
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<id>urn:sha1:f63d19ef52aa66e97fca2425974845177ce02b0a</id>
<content type='text'>
* clk-iproc:
  clk: iproc: define Broadcom NS2 iProc clock binding
  clk: iproc: define Broadcom NSP iProc clock binding
  clk: ns2: add clock support for Broadcom Northstar 2 SoC
  clk: iproc: Separate status and control variables
  clk: iproc: Split off dig_filter
  clk: iproc: Add PLL base write function
  clk: nsp: add clock support for Broadcom Northstar Plus SoC
  clk: iproc: Add PWRCTRL support
  clk: cygnus: Convert all macros to all caps
  ARM: cygnus: fix link failures when CONFIG_COMMON_CLK_IPROC is disabled
</content>
</entry>
<entry>
<title>clk: ns2: add clock support for Broadcom Northstar 2 SoC</title>
<updated>2015-10-22T00:22:58+00:00</updated>
<author>
<name>Jon Mason</name>
<email>jonmason@broadcom.com</email>
</author>
<published>2015-10-15T19:48:31+00:00</published>
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<id>urn:sha1:f7225a832dde995325b486b41728dfbe4634311c</id>
<content type='text'>
The Broadcom Northstar 2 SoC is architected under the iProc
architecture. It has the following PLLs: GENPLL SCR, GENPLL SW,
LCPLL DDR, LCPLL Ports, all derived from an onboard crystal.

Signed-off-by: Jon Mason &lt;jonmason@broadcom.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: nsp: add clock support for Broadcom Northstar Plus SoC</title>
<updated>2015-10-21T23:53:20+00:00</updated>
<author>
<name>Jon Mason</name>
<email>jonmason@broadcom.com</email>
</author>
<published>2015-10-15T19:48:27+00:00</published>
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<id>urn:sha1:5f024b0685f753325f1b8cacbe37ffe5921b13d1</id>
<content type='text'>
The Broadcom Northstar Plus SoC is architected under the iProc
architecture. It has the following PLLs: ARMPLL, GENPLL, LCPLL0, all
derived from an onboard crystal.

Signed-off-by: Jon Mason &lt;jonmason@broadcom.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.</title>
<updated>2015-10-02T00:12:03+00:00</updated>
<author>
<name>Eric Anholt</name>
<email>eric@anholt.net</email>
</author>
<published>2015-09-28T21:22:02+00:00</published>
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<id>urn:sha1:4f61d8e220c110de90a02736ceb55e1e398d6be7</id>
<content type='text'>
clk-bcm2835.c predates the drivers under bcm/, but all the new BCM
drivers are going in there so let's follow them.

Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
Acked-by: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: cygnus: add clock support for Broadcom Cygnus</title>
<updated>2015-06-18T19:36:39+00:00</updated>
<author>
<name>Ray Jui</name>
<email>rjui@broadcom.com</email>
</author>
<published>2015-05-05T18:13:21+00:00</published>
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<id>urn:sha1:61ca7b0c7fffb968bd16394daf05b7e888e9541e</id>
<content type='text'>
The Broadcom Cygnus SoC is architected under the iProc architecture. It
has the following PLLs: ARMPLL, GENPLL, LCPLL0, MIPIPLL, all dervied
from an onboard crystal. Cygnus also has various ASIU clocks that are
derived directly from the onboard crystal.

Signed-off-by: Ray Jui &lt;rjui@broadcom.com&gt;
Reviewed-by: Scott Branden &lt;sbranden@broadcom.com&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
</content>
</entry>
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