linux.git/drivers/clk/hisilicon, branch vm-bind

Merge branches 'clk-starfive', 'clk-ti', 'clk-terminate' and 'clk-cleanup' into clk-next

2022-03-29T17:19:10+00:00

- Audio clks on StarFive JH7100 RISC-V SoC - Terminate arrays with sentinels and make that clearer - Cleanup SPDX tags - Fix typos in comments * clk-starfive: clk: starfive: Add JH7100 audio clock driver clk: starfive: jh7100: Support more clock types clk: starfive: jh7100: Make hw clock implementation reusable dt-bindings: clock: Add starfive,jh7100-audclk bindings dt-bindings: clock: Add JH7100 audio clock definitions clk: starfive: jh7100: Handle audio_div clock properly clk: starfive: jh7100: Don't round divisor up twice * clk-ti: clk: ti: Drop legacy compatibility clocks for dra7 clk: ti: Drop legacy compatibility clocks for am4 clk: ti: Drop legacy compatibility clocks for am3 clk: ti: Update component clocks to use ti_dt_clk_name() clk: ti: Update pll and clockdomain clocks to use ti_dt_clk_name() clk: ti: Add ti_dt_clk_name() helper to use clock-output-names clk: ti: Use clock-output-names for clkctrl clk: ti: Add ti_find_clock_provider() to use clock-output-names clk: ti: Optionally parse IO address from parent clock node clk: ti: Preserve node in ti_dt_clocks_register() clk: ti: Constify clkctrl_name * clk-terminate: clk: actions: Make sentinel elements more obvious clk: clps711x: Terminate clk_div_table with sentinel element clk: hisilicon: Terminate clk_div_table with sentinel element clk: loongson1: Terminate clk_div_table with sentinel element clk: actions: Terminate clk_div_table with sentinel element * clk-cleanup: clk: zynq: Update the parameters to zynq_clk_register_periph_clk clk: zynq: trivial warning fix clk: qcom: sm6125-gcc: fix typos in comments clk: ti: clkctrl: fix typos in comments clk: COMMON_CLK_LAN966X should depend on SOC_LAN966 clk: Use of_device_get_match_data() clk: bcm2835: Remove unused variable clk: tegra: tegra124-emc: Fix missing put_device() call in emc_ensure_emc_driver clk: cleanup comments clk: socfpga: cleanup spdx tags

clk: hisilicon: Terminate clk_div_table with sentinel element

2022-03-12T02:13:24+00:00

In order that the end of a clk_div_table can be detected, it must be terminated with a sentinel element (.div = 0). Fixes: 6c81966107dc0 ("clk: hisilicon: Add clock driver for hi3559A SoC") Signed-off-by: Jonathan Neuschäfer Link: https://lore.kernel.org/r/20220218000922.134857-4-j.neuschaefer@gmx.net Signed-off-by: Stephen Boyd

clk: hisilicon: Remove unnecessary cast of mux table to u32 *

2022-02-26T00:41:39+00:00

Now that clk_register_mux_table takes a const u32 *, we don't need the cast anymore. Signed-off-by: Jonathan Neuschäfer Link: https://lore.kernel.org/r/20220205103613.1216218-5-j.neuschaefer@gmx.net Signed-off-by: Stephen Boyd

clk: hisilicon: hi3559a: select RESET_HISI

2021-07-27T00:23:40+00:00

The clk-hi3559a driver uses functions from reset.c so it should select RESET_HISI to avoid build errors. Fixes these build errors: aarch64-linux-ld: drivers/clk/hisilicon/clk-hi3559a.o: in function `hi3559av100_crg_remove': clk-hi3559a.c:(.text+0x158): undefined reference to `hisi_reset_exit' aarch64-linux-ld: drivers/clk/hisilicon/clk-hi3559a.o: in function `hi3559av100_crg_probe': clk-hi3559a.c:(.text+0x1f4): undefined reference to `hisi_reset_init' aarch64-linux-ld: clk-hi3559a.c:(.text+0x238): undefined reference to `hisi_reset_exit' Fixes: 6c81966107dc ("clk: hisilicon: Add clock driver for hi3559A SoC") Signed-off-by: Randy Dunlap Reported-by: kernel test robot Cc: Dongjiu Geng Cc: Stephen Boyd Cc: stable@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: Michael Turquette Link: https://lore.kernel.org/r/20210717043159.12566-1-rdunlap@infradead.org Reviewed-by: Dongjiu Geng Signed-off-by: Stephen Boyd

clk: hisilicon: hi3559a: Drop __init markings everywhere

2021-06-30T18:59:45+00:00

This driver is a platform driver. The probe function can be called after kernel init, and try to reference kernel memory that has been freed. Drop the __init markings everywhere here to avoid referencing initdata from non-init code. Fixes modpost warnings. Reported-by: kernel test robot Cc: Dongjiu Geng Fixes: 6c81966107dc ("clk: hisilicon: Add clock driver for hi3559A SoC") Link: https://lore.kernel.org/r/20210630185839.3680834-1-sboyd@kernel.org Signed-off-by: Stephen Boyd

clk: hisilicon: Add clock driver for hi3559A SoC

2021-06-28T03:14:24+00:00

Add clock drivers for hi3559A SoC, this driver controls the SoC registers to supply different clocks to different IPs in the SoC. Signed-off-by: Dongjiu Geng Link: https://lore.kernel.org/r/1616498973-47067-3-git-send-email-gengdongjiu1@gmail.com [sboyd@kernel.org: Mark arrays static, add __iomem, drop unused array, avoid kfree of devm memory] Signed-off-by: Stephen Boyd

Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-next

2019-11-27T16:14:17+00:00

* clk-hisi: clk: hi6220: use CLK_OF_DECLARE_DRIVER * clk-amlogic: clk: meson: axg-audio: use devm_platform_ioremap_resource() to simplify code clk: meson: axg_audio: add sm1 support clk: meson: axg-audio: provide clk top signal name clk: meson: axg-audio: prepare sm1 addition clk: meson: axg-audio: fix regmap last register clk: meson: axg-audio: remove useless defines dt-bindings: clock: meson: add sm1 resets to the axg-audio controller dt-bindings: clk: axg-audio: add sm1 bindings clk: meson: g12a: set CLK_MUX_ROUND_CLOSEST on the cpu clock muxes clk: meson: g12a: fix cpu clock rate setting clk: meson: gxbb: let sar_adc_clk_div set the parent clock rate * clk-samsung: clk: samsung: exynos5420: Add SET_RATE_PARENT flag to clocks on G3D path clk: samsung: exynos5420: Preserve CPU clocks configuration during suspend/resume clk: samsung: exynos5420: Add VPLL rate table clk: samsung: exynos5420: Preserve PLL configuration during suspend/resume clk: samsung: exynos542x: Move G3D subsystem clocks to its sub-CMU clk: samsung: exynos5433: Fix error paths * clk-renesas: (23 commits) clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support clk: renesas: Rename CLK_R8A7796 to CLK_R8A77960 dt-bindings: clock: renesas: cpg-mssr: Document r8a77961 support clk: renesas: r8a77965: Remove superfluous semicolon dt-bindings: clock: renesas: rcar-usb2-clock-sel: Fix typo in example dt-bindings: clock: renesas: Remove R-Car Gen2 legacy DT bindings dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions dt-bindings: power: Add r8a77961 SYSC power domain definitions clk: renesas: rcar-gen3: Switch SD clocks to .determine_rate() clk: renesas: rcar-gen3: Switch Z clocks to .determine_rate() clk: renesas: rcar-gen2: Switch Z clock to .determine_rate() clk: renesas: r8a774b1: Add TMU clock clk: renesas: cpg-mssr: Add r8a774b1 support dt-bindings: clock: renesas: cpg-mssr: Document r8a774b1 binding clk: renesas: rcar-gen3: Loop to find best rate in cpg_sd_clock_round_rate() clk: renesas: rcar-gen3: Absorb cpg_sd_clock_calc_div() clk: renesas: rcar-gen3: Avoid double table iteration in SD .set_rate() clk: renesas: rcar-gen3: Improve arithmetic divisions clk: renesas: rcar-gen2: Improve arithmetic divisions clk: renesas: Remove R-Car Gen2 legacy DT clock support ... * clk-imx: clk: imx: imx8mq: fix sys3_pll_out_sels clk: imx7ulp: do not export out IMX7ULP_CLK_MIPI_PLL clock clk: imx: imx6ul: use imx_obtain_fixed_clk_hw to simplify code clk: imx: imx6sx: use imx_obtain_fixed_clk_hw to simplify code clk: imx: imx6sll: use imx_obtain_fixed_clk_hw to simplify code clk: imx: imx7d: use imx_obtain_fixed_clk_hw to simplify code clk: imx7ulp: Correct DDR clock mux options clk: imx7ulp: Correct system clock source option #7 clk: imx: imx8mq: mark sys1/2_pll as fixed clock clk: imx: imx8mn: mark sys_pll1/2 as fixed clock clk: imx: imx8mm: mark sys_pll1/2 as fixed clock clk: imx8mn: Define gates for pll1/2 fixed dividers clk: imx8mm: Define gates for pll1/2 fixed dividers clk: imx8mq: Define gates for pll1/2 fixed dividers clk: imx: clk-pll14xx: Make two variables static clk: imx8mq: Add VIDEO2_PLL clock clk: imx8mn: Use common 1443X/1416X PLL clock structure clk: imx8mm: Move 1443X/1416X PLL clock structure to common place clk: imx: pll14xx: Fix quick switch of S/K parameter

Merge branches 'clk-rohm', 'clk-hisilicon', 'clk-marvell', 'clk-unused' and 'clk-devm-ioremap-resource' into clk-next

2019-11-27T16:13:24+00:00

- Prepare Armada 3700 for suspend to RAM by moving suspend/resume priority for PCIe - Drop unused variables, enums, etc. in various clk drivers - Convert various drivers to use devm_platform_ioremap_resource() * clk-rohm: clk: bd718x7: Add MODULE_ALIAS() * clk-hisilicon: clk: hisilicon: fix sparse warnings in clk-hi3660.c clk: hisilicon: fix sparse warnings in clk-hi3670.c * clk-marvell: dt-bindings: clk: armada3700: document the PCIe clock dt-bindings: clk: armada3700: fix typo in SoC name clk: mvebu: armada-37xx-periph: change suspend/resume time clk: mvebu: armada-37xx-periph: add PCIe gated clock * clk-unused: clk: armada-xp: remove unused code clk: imx: imx8mn: drop unused pll enum clk: ast2600: remove unused variable 'eclk_parent_names' * clk-devm-ioremap-resource: clk: sprd: Change to use devm_platform_ioremap_resource() clk: s3c2410: use devm_platform_ioremap_resource() to simplify code clk: axs10x: use devm_platform_ioremap_resource() to simplify code clk: mediatek: mt6797: use devm_platform_ioremap_resource() to simplify code clk: mediatek: mt7629: use devm_platform_ioremap_resource() to simplify code clk: mediatek: mt7622: use devm_platform_ioremap_resource() to simplify code clk: mediatek: mt8183: use devm_platform_ioremap_resource() to simplify code clk: mediatek: mt6779: use devm_platform_ioremap_resource() to simplify code clk: mediatek: mt2712: use devm_platform_ioremap_resource() to simplify code clk: davinci: use devm_platform_ioremap_resource() to simplify code clk: hisilicon: use devm_platform_ioremap_resource() to simplify code clk: bcm2835: use devm_platform_ioremap_resource() to simplify code

clk: hi6220: use CLK_OF_DECLARE_DRIVER

2019-10-28T15:07:52+00:00

As now we also need to probe in the reset driver as well. Cc: Michael Turquette Cc: Stephen Boyd Cc: Allison Randal Cc: Peter Griffin Cc: linux-clk@vger.kernel.org Signed-off-by: Peter Griffin Signed-off-by: John Stultz Link: https://lkml.kernel.org/r/20191001182546.70090-1-john.stultz@linaro.org [sboyd@kernel.org: Add comment about reset driver] Signed-off-by: Stephen Boyd

clk: hisilicon: use devm_platform_ioremap_resource() to simplify code

2019-10-16T23:17:06+00:00

Use devm_platform_ioremap_resource() to simplify the code a bit. This is detected by coccinelle. Signed-off-by: YueHaibing Link: https://lkml.kernel.org/r/20191014144014.20644-1-yuehaibing@huawei.com Signed-off-by: Stephen Boyd