linux.git/drivers/clk/mvebu/Kconfig, branch master

clk: mvebu: Add the xtal clock for Armada 3700 SoC

2016-08-15T21:07:04+00:00

This clock is the parent of all the Armada 3700 clocks. It is a fixed rate clock which depends on the gpio configuration read when resetting the SoC. Signed-off-by: Gregory CLEMENT Signed-off-by: Stephen Boyd

clk: mvebu: new driver for Armada CP110 system controller

2016-05-06T22:27:02+00:00

The Armada CP110 system controller provides, amongst other things, a number of clocks for the platform: a small number of core clocks, and then a number of gatable clocks, derived from some of the core clocks. Those clocks are configured via registers of the CP110 System Controller. The CP110 is the other core HW block (next to the AP806) used in the Marvel Armada 7K and 8K SoCs. Signed-off-by: Thomas Petazzoni [sboyd@codeaurora.org: Silence some checkpatch noise] Signed-off-by: Stephen Boyd

clk: mvebu: new driver for Armada AP806 system controller

2016-05-06T22:13:56+00:00

The Armada AP806 system controller, amongst other things, provides a number of clocks for the platform: the CPU cluster clocks, whose frequencies are found by reading the Sample At Reset register, one fixed clock, and another clock derived from the fixed clock, which is the one used by most peripherals in AP806. The AP806 is one of the two core HW blocks used in the Marvell 7K/8K SoCs. Signed-off-by: Thomas Petazzoni [sboyd@codeaurora.org: Silence some checkpatch noise] Signed-off-by: Stephen Boyd

clk: mvebu: Move corediv config to mvebu config

2016-02-25T23:05:53+00:00

The core clock does not depend on corediv, so enabling corediv based on the clock is not really correct. Move the corediv config option from the clock driver Kconfig to the mvebu Kconfig so that it can be enabled by the MACH option instead. This also enables corediv on Armada 375 and 38X, which was previously missing. Signed-off-by: Kevin Smith Cc: Michael Turquette Cc: Stephen Boyd Cc: Gregory CLEMENT Cc: Thomas Petazzoni Signed-off-by: Stephen Boyd

clk: mvebu: Remove corediv clock from Armada XP

2016-02-25T23:05:47+00:00

There is no corediv clock on Armada XP, so this is unnecessary. Signed-off-by: Kevin Smith Acked-by: Michael Turquette Acked-by: Gregory CLEMENT Cc: Thomas Petazzoni Signed-off-by: Stephen Boyd

clk: mvebu: add Marvell Armada 39x driver

2015-03-04T14:18:53+00:00

This commit adds a new clock driver for the Marvell Armada 39x family of processors. This driver is fairly similar to the ones already used on other Marvell EBU processors, with the following main differences: * Different set of ratios * Different set of core clocks * Configurable reference clock in frequency Signed-off-by: Thomas Petazzoni Signed-off-by: Gregory CLEMENT

clk: mvebu: add Orion5x clock driver

2014-04-26T01:03:55+00:00

This commit adds a core clock driver for the Orion5x SoC, with support for the tclk, the CPU frequency and the DDR frequency. All the details about the Sample-At-Reset register were extracted from the U-Boot sources for Orion5x. Note that Orion5x does not have gatable clocks, so this core clock driver is sufficient to support clocking on Orion5x platforms. Signed-off-by: Thomas Petazzoni Acked-by: Sebastian Hesselbarth Link: https://lkml.kernel.org/r/1398202002-28530-5-git-send-email-thomas.petazzoni@free-electrons.com Cc: Mike Turquette Signed-off-by: Jason Cooper

clk: mvebu: add clock support for Armada 380/385

2014-02-17T02:34:05+00:00

Add the clock support for the new SoCs Armada 380 and Armada 385: core clocks and gating clocks. Signed-off-by: Gregory CLEMENT Reviewed-by: Thomas Petazzoni Signed-off-by: Jason Cooper

clk: mvebu: add clock support for Armada 375

2014-02-17T02:34:01+00:00

Add the clock support for the new SoC Armada 375: core clocks and gating clocks. Signed-off-by: Gregory CLEMENT Reviewed-by: Thomas Petazzoni Signed-off-by: Jason Cooper

clk: mvebu: Add Core Divider clock

2013-11-24T17:29:25+00:00

This commit introduces a new group of clocks present in Armada 370/XP SoCs (called "Core Divider" clocks) and add a provider for them. The only clock supported for now is the NAND clock (ndclk), but the infrastructure to add the rest is already set. Reviewed-by: Gregory CLEMENT Signed-off-by: Ezequiel Garcia Signed-off-by: Mike Turquette