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<title>linux.git/drivers/clk/mvebu/Makefile, branch master</title>
<subtitle>Linux Kernel</subtitle>
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<updated>2016-08-15T21:10:27+00:00</updated>
<entry>
<title>clk: mvebu: Add the peripheral clock driver for Armada 3700</title>
<updated>2016-08-15T21:10:27+00:00</updated>
<author>
<name>Gregory CLEMENT</name>
<email>gregory.clement@free-electrons.com</email>
</author>
<published>2016-07-19T13:42:22+00:00</published>
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<id>urn:sha1:8ca4746a78abc39cc0496654068eaaadb0f3c4d0</id>
<content type='text'>
These clocks are the ones which will be used as source for the
peripherals of the Armada 3700 SoC. On this SoC there is two blocks of
clocks: the North bridge one and the South bridge one.

Most of them are gatable. Most of the time their rate are their parent
rated divided by a ratio depending of two registers. Their parent can be
choose between the TBG clocks for most of them.

However, some of them can't choose their parent or directly depend of the
xtal clocks. Other ones do not use exactly the same pattern to find the
ratio between their parent rate and their rate.

For these reason each clock is a composite clock and the operations they
use are different depending of the clock.

According to the datasheet it would be possible to select the parent
clock and the ratio, however currently the driver does not support it.

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: mvebu Add the time base generator clocks for Armada 3700</title>
<updated>2016-08-15T21:10:20+00:00</updated>
<author>
<name>Gregory CLEMENT</name>
<email>gregory.clement@free-electrons.com</email>
</author>
<published>2016-07-19T13:42:20+00:00</published>
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<id>urn:sha1:96265523ace51b71dc1b2fd445a93c4b2f9bedb8</id>
<content type='text'>
These clocks are children of the xtal clock and each one can be selected
as a source for the peripheral clocks.

According to the datasheet it should be possible to modify their rate,
but currently it is not supported.

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: mvebu: Add the xtal clock for Armada 3700 SoC</title>
<updated>2016-08-15T21:07:04+00:00</updated>
<author>
<name>Gregory CLEMENT</name>
<email>gregory.clement@free-electrons.com</email>
</author>
<published>2016-07-19T13:42:18+00:00</published>
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<id>urn:sha1:7ea8250406a6abe2f057c2096249c63b788b728f</id>
<content type='text'>
This clock is the parent of all the Armada 3700 clocks. It is a fixed
rate clock which depends on the gpio configuration read when resetting
the SoC.

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: mvebu: new driver for Armada CP110 system controller</title>
<updated>2016-05-06T22:27:02+00:00</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2016-04-14T15:33:33+00:00</published>
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<id>urn:sha1:d3da3eaef7f4d0317d01c08824b65e5aee1315ef</id>
<content type='text'>
The Armada CP110 system controller provides, amongst other things, a
number of clocks for the platform: a small number of core clocks, and
then a number of gatable clocks, derived from some of the core
clocks. Those clocks are configured via registers of the CP110 System
Controller.

The CP110 is the other core HW block (next to the AP806) used in the
Marvel Armada 7K and 8K SoCs.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
[sboyd@codeaurora.org: Silence some checkpatch noise]
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: mvebu: new driver for Armada AP806 system controller</title>
<updated>2016-05-06T22:13:56+00:00</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2016-04-14T15:33:31+00:00</published>
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<id>urn:sha1:89a426b1966588eb215ec08530054016ee10b0cc</id>
<content type='text'>
The Armada AP806 system controller, amongst other things, provides a
number of clocks for the platform: the CPU cluster clocks, whose
frequencies are found by reading the Sample At Reset register, one
fixed clock, and another clock derived from the fixed clock, which is
the one used by most peripherals in AP806.

The AP806 is one of the two core HW blocks used in the Marvell 7K/8K
SoCs.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
[sboyd@codeaurora.org: Silence some checkpatch noise]
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: add Dove PLL divider support for GPU, VMeta and AXI clocks</title>
<updated>2015-12-22T20:25:00+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2015-12-08T10:38:05+00:00</published>
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<id>urn:sha1:63b8d92c793f8622227f70b0685a356d47178cfa</id>
<content type='text'>
Add support for the Dove PLL dividers, which are used to generate the
clocks for the AXI bus, as well as the GPU and VMeta peripherals.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
</content>
</entry>
<entry>
<title>clk: mvebu: add Marvell Armada 39x driver</title>
<updated>2015-03-04T14:18:53+00:00</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2015-03-03T14:41:09+00:00</published>
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<id>urn:sha1:8da6f3c1662a74a39b5ebc773ee27a949b5d7658</id>
<content type='text'>
This commit adds a new clock driver for the Marvell Armada 39x family
of processors. This driver is fairly similar to the ones already used
on other Marvell EBU processors, with the following main differences:

 * Different set of ratios
 * Different set of core clocks
 * Configurable reference clock in frequency

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Signed-off-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>clk: mvebu: add Orion5x clock driver</title>
<updated>2014-04-26T01:03:55+00:00</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2014-04-22T21:26:08+00:00</published>
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<id>urn:sha1:66ecbfea762ad28bd108db76775483b491068b92</id>
<content type='text'>
This commit adds a core clock driver for the Orion5x SoC, with support
for the tclk, the CPU frequency and the DDR frequency. All the details
about the Sample-At-Reset register were extracted from the U-Boot
sources for Orion5x.

Note that Orion5x does not have gatable clocks, so this core clock
driver is sufficient to support clocking on Orion5x platforms.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Acked-by: Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;
Link: https://lkml.kernel.org/r/1398202002-28530-5-git-send-email-thomas.petazzoni@free-electrons.com
Cc: Mike Turquette &lt;mturquette@linaro.org&gt;
Signed-off-by: Jason Cooper &lt;jason@lakedaemon.net&gt;
</content>
</entry>
<entry>
<title>clk: mvebu: add clock support for Armada 380/385</title>
<updated>2014-02-17T02:34:05+00:00</updated>
<author>
<name>Gregory CLEMENT</name>
<email>gregory.clement@free-electrons.com</email>
</author>
<published>2014-02-10T17:32:47+00:00</published>
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<id>urn:sha1:0e85aeced4d6cd2f4f2755eff453da3e0a2286fc</id>
<content type='text'>
Add the clock support for the new SoCs Armada 380 and Armada 385:
core clocks and gating clocks.

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Reviewed-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Signed-off-by: Jason Cooper &lt;jason@lakedaemon.net&gt;
</content>
</entry>
<entry>
<title>clk: mvebu: add clock support for Armada 375</title>
<updated>2014-02-17T02:34:01+00:00</updated>
<author>
<name>Gregory CLEMENT</name>
<email>gregory.clement@free-electrons.com</email>
</author>
<published>2014-02-10T17:32:44+00:00</published>
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<id>urn:sha1:41d3c64f8cddb51f7caf45b7591d27024cae38a0</id>
<content type='text'>
Add the clock support for the new SoC Armada 375: core clocks and
gating clocks.

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@free-electrons.com&gt;
Reviewed-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Signed-off-by: Jason Cooper &lt;jason@lakedaemon.net&gt;
</content>
</entry>
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