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<title>linux.git/drivers/crypto/Kconfig, branch master</title>
<subtitle>Linux Kernel</subtitle>
<id>https://git.etezian.org/cgit.cgi/linux.git/atom?h=master</id>
<link rel='self' href='https://git.etezian.org/cgit.cgi/linux.git/atom?h=master'/>
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<updated>2016-12-15T22:13:32+00:00</updated>
<entry>
<title>crypto: add virtio-crypto driver</title>
<updated>2016-12-15T22:13:32+00:00</updated>
<author>
<name>Gonglei</name>
<email>arei.gonglei@huawei.com</email>
</author>
<published>2016-12-15T02:03:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.etezian.org/cgit.cgi/linux.git/commit/?id=dbaf0624ffa57ae6e7d87a823185ccd9a7852d3c'/>
<id>urn:sha1:dbaf0624ffa57ae6e7d87a823185ccd9a7852d3c</id>
<content type='text'>
This patch introduces virtio-crypto driver for Linux Kernel.

The virtio crypto device is a virtual cryptography device
as well as a kind of virtual hardware accelerator for
virtual machines. The encryption anddecryption requests
are placed in the data queue and are ultimately handled by
thebackend crypto accelerators. The second queue is the
control queue used to create or destroy sessions for
symmetric algorithms and will control some advanced features
in the future. The virtio crypto device provides the following
cryptoservices: CIPHER, MAC, HASH, and AEAD.

For more information about virtio-crypto device, please see:
  http://qemu-project.org/Features/VirtioCrypto

CC: Michael S. Tsirkin &lt;mst@redhat.com&gt;
CC: Cornelia Huck &lt;cornelia.huck@de.ibm.com&gt;
CC: Stefan Hajnoczi &lt;stefanha@redhat.com&gt;
CC: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
CC: Halil Pasic &lt;pasic@linux.vnet.ibm.com&gt;
CC: David S. Miller &lt;davem@davemloft.net&gt;
CC: Zeng Xin &lt;xin.zeng@intel.com&gt;
Signed-off-by: Gonglei &lt;arei.gonglei@huawei.com&gt;
Signed-off-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6</title>
<updated>2016-10-10T21:04:16+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2016-10-10T21:04:16+00:00</published>
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<id>urn:sha1:30066ce675d3af350bc5a53858991c0b518dda00</id>
<content type='text'>
Pull crypto updates from Herbert Xu:
 "Here is the crypto update for 4.9:

  API:
   - The crypto engine code now supports hashes.

  Algorithms:
   - Allow keys &gt;= 2048 bits in FIPS mode for RSA.

  Drivers:
   - Memory overwrite fix for vmx ghash.
   - Add support for building ARM sha1-neon in Thumb2 mode.
   - Reenable ARM ghash-ce code by adding import/export.
   - Reenable img-hash by adding import/export.
   - Add support for multiple cores in omap-aes.
   - Add little-endian support for sha1-powerpc.
   - Add Cavium HWRNG driver for ThunderX SoC"

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (137 commits)
  crypto: caam - treat SGT address pointer as u64
  crypto: ccp - Make syslog errors human-readable
  crypto: ccp - clean up data structure
  crypto: vmx - Ensure ghash-generic is enabled
  crypto: testmgr - add guard to dst buffer for ahash_export
  crypto: caam - Unmap region obtained by of_iomap
  crypto: sha1-powerpc - little-endian support
  crypto: gcm - Fix IV buffer size in crypto_gcm_setkey
  crypto: vmx - Fix memory corruption caused by p8_ghash
  crypto: ghash-generic - move common definitions to a new header file
  crypto: caam - fix sg dump
  hwrng: omap - Only fail if pm_runtime_get_sync returns &lt; 0
  crypto: omap-sham - shrink the internal buffer size
  crypto: omap-sham - add support for export/import
  crypto: omap-sham - convert driver logic to use sgs for data xmit
  crypto: omap-sham - change the DMA threshold value to a define
  crypto: omap-sham - add support functions for sg based data handling
  crypto: omap-sham - rename sgl to sgl_tmp for deprecation
  crypto: omap-sham - align algorithms on word offset
  crypto: omap-sham - add context export/import stubs
  ...
</content>
</entry>
<entry>
<title>crypto: omap-aes - Add fallback support</title>
<updated>2016-09-13T12:23:10+00:00</updated>
<author>
<name>Lokesh Vutla</name>
<email>lokeshvutla@ti.com</email>
</author>
<published>2016-08-04T10:28:44+00:00</published>
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<id>urn:sha1:9fcb191a84eb5c46004b66cc449b45b4d9a2da91</id>
<content type='text'>
As setting up the DMA operations is quite costly, add software fallback
support for requests smaller than 200 bytes. This change gives some 10%
extra performance in ipsec use case.

Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
[t-kristo@ti.com: udpated against latest upstream, to use skcipher mainly]
Signed-off-by: Tero Kristo &lt;t-kristo@ti.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: Added Chelsio Menu to the Kconfig file</title>
<updated>2016-08-19T07:00:37+00:00</updated>
<author>
<name>Hariprasad Shenai</name>
<email>hariprasad@chelsio.com</email>
</author>
<published>2016-08-17T07:03:06+00:00</published>
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<id>urn:sha1:02038fd6645a08df1d3b37c12a065940b15ed4fe</id>
<content type='text'>
Adds the config entry for the Chelsio Crypto Driver, Makefile changes
for the same.

Signed-off-by: Atul Gupta &lt;atul.gupta@chelsio.com&gt;
Signed-off-by: Hariprasad Shenai &lt;hariprasad@chelsio.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>s390/crc32-vx: add crypto API module for optimized CRC-32 algorithms</title>
<updated>2016-06-15T14:36:34+00:00</updated>
<author>
<name>Hendrik Brueckner</name>
<email>brueckner@linux.vnet.ibm.com</email>
</author>
<published>2015-04-28T13:52:44+00:00</published>
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<id>urn:sha1:f848dbd3bc1a71274241c080b57eb912ff9f0098</id>
<content type='text'>
Add a crypto API module to access the vector extension based CRC-32
implementations.  Users can request the optimized implementation through
the shash crypto API interface.

Signed-off-by: Hendrik Brueckner &lt;brueckner@linux.vnet.ibm.com&gt;
Signed-off-by: Martin Schwidefsky &lt;schwidefsky@de.ibm.com&gt;
</content>
</entry>
<entry>
<title>crypto: omap-des - Integrate with the crypto engine framework</title>
<updated>2016-05-03T08:08:48+00:00</updated>
<author>
<name>Baolin Wang</name>
<email>baolin.wang@linaro.org</email>
</author>
<published>2016-04-28T06:11:51+00:00</published>
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<id>urn:sha1:f1b77aaca85a610948f02d11288845f4cfe7d3eb</id>
<content type='text'>
Since the crypto engine framework had been merged, thus this patch integrates
with the newly added crypto engine framework to make the crypto hardware
engine under utilized as each block needs to be processed before the crypto
hardware can start working on the next block.

The crypto engine framework can manage and process the requests automatically,
so remove the 'queue' and 'queue_task' things in omap des driver.

Signed-off-by: Baolin &lt;baolin.wang@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto4xx: integrate ppc4xx-rng into crypto4xx</title>
<updated>2016-04-20T09:50:02+00:00</updated>
<author>
<name>Christian Lamparter</name>
<email>chunkeey@googlemail.com</email>
</author>
<published>2016-04-18T10:57:41+00:00</published>
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<id>urn:sha1:5343e674f32fb82b7a80a24b5a84eee62d3fe624</id>
<content type='text'>
This patch integrates the ppc4xx-rng driver into the existing
crypto4xx. This is because the true random number generator
is controlled and part of the security core.

Signed-off-by: Christian Lamparter &lt;chunkeey@googlemail.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: mxc-scc - add basic driver for the MXC SCC</title>
<updated>2016-04-15T14:36:35+00:00</updated>
<author>
<name>Steffen Trumtrar</name>
<email>s.trumtrar@pengutronix.de</email>
</author>
<published>2016-04-12T09:04:26+00:00</published>
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<id>urn:sha1:d293b640ebd532eb9d65bc42d48fb9d2c06e71c9</id>
<content type='text'>
According to the Freescale GPL driver code, there are two different
Security Controller (SCC) versions: SCC and SCC2.

The SCC is found on older i.MX SoCs, e.g. the i.MX25. This is the
version implemented and tested here.

As there is no publicly available documentation for this IP core,
all information about this unit is gathered from the GPL'ed driver
from Freescale.

Signed-off-by: Steffen Trumtrar &lt;s.trumtrar@pengutronix.de&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: s5p-sss - Enable COMPILE_TEST</title>
<updated>2016-04-05T12:35:44+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>k.kozlowski@samsung.com</email>
</author>
<published>2016-03-14T04:20:18+00:00</published>
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<id>urn:sha1:dc1d9dee3042d4c507bd7eb557a06918a1f09ae0</id>
<content type='text'>
Get some build coverage of S5P/Exynos AES H/W acceleration driver.
Driver uses DMA and devm_ioremap_resource() so add DMA and IOMEM
dependencies for the compile testing.

Signed-off-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Acked-by: Vladimir Zapolskiy &lt;vz@mleia.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: omap-des - Improve wording for CRYPTO_DEV_OMAP_DES in Kconfig</title>
<updated>2016-04-05T12:35:42+00:00</updated>
<author>
<name>Peter Meerwald</name>
<email>pmeerw@pmeerw.net</email>
</author>
<published>2016-03-13T15:15:37+00:00</published>
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<id>urn:sha1:97ee7ed394f9f277f492026b9a0708cd92e6ef7d</id>
<content type='text'>
Signed-off-by: Peter Meerwald &lt;pmeerw@pmeerw.net&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
</feed>
