linux.git/drivers/net/dsa, branch master

net: dsa: bcm_sf2: Utilize nested MDIO read/write

2017-01-09T03:01:22+00:00

We are implementing a MDIO bus which is behind another one, so use the nested version of the accessors to get lockdep annotations correct. Fixes: 461cd1b03e32 ("net: dsa: bcm_sf2: Register our slave MDIO bus") Signed-off-by: Florian Fainelli Reviewed-by: Andrew Lunn Signed-off-by: David S. Miller

net: dsa: bcm_sf2: Do not clobber b53_switch_ops

2017-01-09T03:01:22+00:00

We make the bcm_sf2 driver override ds->ops which points to b53_switch_ops since b53_switch_alloc() did the assignent. This is all well and good until a second b53 switch comes in, and ends up using the bcm_sf2 operations. Make a proper local copy, substitute the ds->ops pointer and then override the operations. Fixes: f458995b9ad8 ("net: dsa: bcm_sf2: Utilize core B53 driver when possible") Signed-off-by: Florian Fainelli Reviewed-by: Andrew Lunn Signed-off-by: David S. Miller

net: dsa: mv88e6xxx: Fix opps when adding vlan bridge

2016-12-16T18:26:50+00:00

A port is not necessarily assigned to a netdev. And a port does not need to be a member of a bridge. So when iterating over all ports, check before using the netdev and bridge_dev for a port. Otherwise we dereference a NULL pointer. Fixes: da9c359e19f0 ("net: dsa: mv88e6xxx: check hardware VLAN in use") Signed-off-by: Andrew Lunn Reviewed-by: Vivien Didelot Signed-off-by: David S. Miller

net: dsa: mv88e6xxx: add PPU operations

2016-12-06T16:32:28+00:00

Some Marvell chips can enable/disable the PPU on demand. This is needed to access the PHY registers when there is no indirection mechanism. Add two new ppu_enable and ppu_disable ops to describe this and finally get rid of the MV88E6XXX_FLAG_PPU* flags. Signed-off-by: Vivien Didelot Signed-off-by: David S. Miller

net: dsa: mv88e6xxx: add a soft reset operation

2016-12-06T16:32:28+00:00

Marvell chips have different way to issue a software reset. Old chips (such as 88E6060) have a reset bit in an ATU control register. Newer chips moved this bit in a Global control register. Chips with controllable PPU should reset the PPU when resetting the switch. Add a new reset operation to implement these differences and introduce a mv88e6xxx_software_reset() helper to wrap it conveniently. Signed-off-by: Vivien Didelot Signed-off-by: David S. Miller

net: dsa: mv88e6xxx: add helper to hardware reset

2016-12-06T16:32:28+00:00

Add an helper to toggle the eventual GPIO connected to the reset pin. Signed-off-by: Vivien Didelot Reviewed-by: Andrew Lunn Signed-off-by: David S. Miller

net: dsa: mv88e6xxx: add helper to disable ports

2016-12-06T16:32:28+00:00

Before resetting a switch, the ports should be set to the Disabled state and the transmit queues should be drained. Add an helper to explicit that. Signed-off-by: Vivien Didelot Reviewed-by: Andrew Lunn Signed-off-by: David S. Miller

net: dsa: mv88e6xxx: Use EDSA on mv88e6097

2016-12-06T15:17:02+00:00

Use DSA_TAG_PROTO_EDSA as tag_protocol for the mv88e6097. The initialisation was missing before. Fixes: a1f482aa8c33 ("net: dsa: mv88e6xxx: Move the tagging protocol into info") Signed-off-by: Stefan Eichenberger Reviewed-by: Andrew Lunn Signed-off-by: David S. Miller

net: dsa: mv88e6xxx: Implement mv88e6390 pause control

2016-12-04T04:18:39+00:00

The mv88e6390 has a number flow control registers accessed via the Flow Control register. Use these to set the pause control. Signed-off-by: Andrew Lunn Signed-off-by: David S. Miller

net: dsa: mv88e6xxx: Refactor pause configuration

2016-12-04T04:18:39+00:00

The mv88e6390 has a different mechanism for configuring pause. Refactor the code into an ops function, and for the moment, don't add any mv88e6390 code yet. Signed-off-by: Andrew Lunn Signed-off-by: David S. Miller