linux.git/drivers/pinctrl/qcom, branch master

pinctrl: qcom: Add msm8994 pinctrl driver

2016-11-04T22:55:36+00:00

Initial pinctrl driver for QCOM msm8994 platforms. In order to continue the initial board support for QCOM msm8994/msm8992 presented in patches from Jeremy McNicoll , let's put a proper pinctrl driver in place. Currently, the DT for these platforms uses the msm8x74 pinctrl driver to enable basic UART. Beyond the first few pins the rest are different enough to justify it's own driver. Note: This driver is also used by QCOM's msm8992 platform as it's TLM block is the same. - Initial formatting and style was taken from the msm8x74 pinctrl driver added by Björn Andersson - Data was then adjusted per QCOM MSM8994v2 documentation for Top Level Multiplexing - Bindings documentation was based on qcom,msm8996-pinctrl.txt by Joonwoo Park and then modified for msm8994 content Signed-off-by: Michael Scott Tested-by: Jeremy McNicoll Acked-by: Bjorn Andersson Acked-by: Rob Herring Signed-off-by: Linus Walleij

pinctrl: qcom: fix masking of pinmux functions

2016-10-03T22:36:20+00:00

The following commit introduced a regression by not properly masking the calculated value. Fixes: 47a01ee9a6c3 ("pinctrl: qcom: Clear all function selection bits") Signed-off-by: John Crispin Reviewed-by: Bjorn Andersson Reviewed-by: Stephen Boyd Signed-off-by: Linus Walleij

pinctrl: qcom: Add generic ssbi and spmi GPIO/MPP bindings

2016-08-11T08:18:46+00:00

The drivers don't really need to know which PMIC they're for, so make a generic binding for them. This alleviates us from updating the drivers every time a new PMIC comes out. It's still recommended that we update the binding with new PMIC models and always specify the specific model for the MPPs and gpios before the generic compatible string in devicetree, but this at least cuts down on adding more and more compatible strings to the drivers until we actually need them. Cc: Acked-by: "Ivan T. Ivanov" Reviewed-by: Bjorn Andersson Acked-by: Rob Herring Signed-off-by: Stephen Boyd Signed-off-by: Linus Walleij

pinctrl: qcom: establish proper EBI2 pin groups

2016-07-08T17:37:33+00:00

After some digging around I found documentation (!) of the APQ8060 EBI2 pin groups. It turns out I first need to split the group in two: ebi2cs and ebi2 proper. The chip select pins are kind of orthogonal to the other EBI2 pins since CS1B and CS2B can be muxed over address bits 7 and 6 (don't know why, but they can). This is good to fix up before we add users. Also found what the "holes" in the assignment all the way up to gpio158 was actually for. All mux documentation comes from "Snapdragon(TM) S3 APQ8060-based DragonBoard(TM) GPIO User Guide Rev. E August 10, 2012", published by Bsquare Corporation. As the documentation seems a bit hard to come by I put some comments in the group definitions so that it is clear to all readers what is going on here and what the lines are used for. Cc: Björn Andersson Cc: Stephen Boyd Reviewed-by: Andy Gross Signed-off-by: Linus Walleij

pinctrl: qcom: add support for EBI2

2016-07-03T21:35:05+00:00

Add support to mux in the second external bus interface as follows: - CS1 and CS2 on GPIO39 and GPIO40 as func 2 - ADDR_7 thru ADDR_0 on GPIO123 thru GPIO130 as func 1 - CS4, CS3 and CS0 on GPIO132, GPIO133, GPIO134 as func 1 - DATA_15 thru DATA_0 on GPIO135 thru GPIO150 as func 1 - OE on GPIO151 as func 1 - ADV on GPIO153 as func 1 - WE on GPIO157 as func 1 This external bus is used on the APQ8060 Dragonboard to connect an external SMSC9211 ethernet adapter, but there are many other usecases for the EBI2. Cc: Stephen Boyd Reviewed-by: Björn Andersson Signed-off-by: Linus Walleij

pinctrl: qcom: msm8974: Add hsic_ctl pinmux

2016-06-29T08:14:46+00:00

The msm8974 pinctrl variant has a couple USB HSIC "glue" registers that let us mux between the pinctrl register settings or the HSIC core settings for the HSIC pins (gpio 144 and gpio 145). Support this method of operation by adding hsic_data and hsic_strobe pins that can select between hsic_ctl and gpio functions. This allows us to toggle the hsic pin configuration over to the HSIC core at runtime. Cc: Bjorn Andersson Signed-off-by: Stephen Boyd Signed-off-by: Linus Walleij

pinctrl: qcom: Clear all function selection bits

2016-06-29T08:13:44+00:00

The function selection bitfield is not always 3 bits wide. Sometimes it is 4 bits wide. Let's use the npins struct member to determine how many bits wide the function selection bitfield is so we clear the correct amount of bits in the register while remuxing the pins. Cc: Bjorn Andersson Signed-off-by: Stephen Boyd Signed-off-by: Linus Walleij

pinctrl: qcom: Add support for MDM9615 TLMM

2016-06-29T08:10:52+00:00

In order to support the Qualcomm MDM9615 SoC, add support for the TLMM using the Qualcomm pinctrl generic driver. Note: the pinctrl is partial, need Documentation to complete all the groups. Signed-off-by: Neil Armstrong Acked-by: Bjorn Andersson Signed-off-by: Linus Walleij

pinctrl: qcom-ssbi: support for PM8058

2016-06-15T06:37:31+00:00

The PM8058 is found in connection to the APQ8060 on the APQ8060 Dragonboard. Works the same as all others, just add the compatible string for this variant. Cc: Bjorn Andersson Cc: Andy Gross Reviewed-by: Stephen Boyd Signed-off-by: Linus Walleij

Merge tag 'pinctrl-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2016-05-19T19:50:56+00:00

Pull pin control updates from Linus Walleij: "This kernel cycle was quite calm when it comes to pin control and there is really just one major change, and that is the introduction of devm_pinctrl_register() managed resources. Apart from that linear development, details below. Core changes: - Add the devm_pinctrl_register() API and switch all applicable drivers to use it, saving lots of lines of code all over the place. New drivers: - driver for the Broadcom NS2 SoC - subdriver for the PXA25x SoCs - subdriver for the AMLogic Meson GXBB SoC Driver improvements: - the Intel Baytrail driver now properly supports pin control - Nomadik, Rockchip, Broadcom BCM2835 support the .get_direction() callback in the GPIO portions - continued development and stabilization of several SH-PFC SoC subdrivers: r8a7795, r8a7790, r8a7794 etc" * tag 'pinctrl-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (85 commits) Revert "pinctrl: tegra: avoid parked_reg and parked_bank" pinctrl: meson: Fix eth_tx_en bit index pinctrl: tegra: avoid parked_reg and parked_bank pinctrl: tegra: Correctly check the supported configuration pinctrl: amlogic: Add support for Amlogic Meson GXBB SoC pinctrl: rockchip: fix pull setting error for rk3399 pinctrl: stm32: Implement .pin_config_dbg_show() pinctrl: nomadik: hide nmk_gpio_get_mode when unused pinctrl: ns2: rename pinctrl_utils_dt_free_map pinctrl: at91: Merge clk_prepare and clk_enable into clk_prepare_enable pinctrl: at91: Make at91_gpio_template const pinctrl: baytrail: fix some error handling in debugfs pinctrl: ns2: add pinmux driver support for Broadcom NS2 SoC pinctrl: sirf/atlas7: trivial fix of spelling mistake on flagged pinctrl: sh-pfc: Kill unused variable in sh_pfc_remove() pinctrl: nomadik: implement .get_direction() pinctrl: nomadik: use BIT() with offsets consequently pinctrl: exynos5440: Use off-stack memory for pinctrl_gpio_range pinctrl: zynq: Use devm_pinctrl_register() for pinctrl registration pinctrl: u300: Use devm_pinctrl_register() for pinctrl registration ...