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| author | Dinh Nguyen <dinguyen@kernel.org> | 2018-11-05 14:05:49 -0600 |
|---|---|---|
| committer | Philipp Zabel <p.zabel@pengutronix.de> | 2019-01-07 16:38:51 +0100 |
| commit | a277105b239bdcb6490ec51366413643dbc8ed4a (patch) | |
| tree | 7d4b25fb4467dd66f6a8093319dfd28b80e3e1ca | |
| parent | b3ca9888f35fa6919569cf27c929dc0ac49e9716 (diff) | |
ARM: socfpga: dts: document "altr,stratix10-rst-mgr" binding
"altr,stratix10-rst-mgr" is used for the Stratix10 reset manager.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| -rw-r--r-- | Documentation/devicetree/bindings/reset/socfpga-reset.txt | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/reset/socfpga-reset.txt b/Documentation/devicetree/bindings/reset/socfpga-reset.txt index 98c9f560e5c5..38fe34fd8b8a 100644 --- a/Documentation/devicetree/bindings/reset/socfpga-reset.txt +++ b/Documentation/devicetree/bindings/reset/socfpga-reset.txt @@ -1,7 +1,8 @@ Altera SOCFPGA Reset Manager Required properties: -- compatible : "altr,rst-mgr" +- compatible : "altr,rst-mgr" for (Cyclone5/Arria5/Arria10) + "altr,stratix10-rst-mgr","altr,rst-mgr" for Stratix10 ARM64 SoC - reg : Should contain 1 register ranges(address and length) - altr,modrst-offset : Should contain the offset of the first modrst register. - #reset-cells: 1 |