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authorAndrzej Hajda <a.hajda@samsung.com>2016-05-10 15:36:51 +0200
committerSeung-Woo Kim <sw0312.kim@samsung.com>2016-12-14 13:50:47 +0900
commit20a42c5007c9536cb909a75917243b09baff85ee (patch)
tree6498824ebf3f5d1084e2898ba06f3a4c6a033cae
parenta4457f796a8c3ed67c950b55b55b8a52a45ed66c (diff)
drm/panel/s6e3ha2: fix initialization sequence
Panel datasheet is not clear about it but directly after dsi interface setting and calibration of panel, DSIM/MIC should start transmission, panel should then wait 120ms and finish its initialization. The patch fixes frequent image loss on draco board. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Change-Id: I194d5bae87bac0e436469d6f5949ee756656b16b
-rw-r--r--drivers/gpu/drm/panel/panel-s6e3ha2.c64
1 files changed, 34 insertions, 30 deletions
diff --git a/drivers/gpu/drm/panel/panel-s6e3ha2.c b/drivers/gpu/drm/panel/panel-s6e3ha2.c
index 2638505e44ea..ab305d0beeeb 100644
--- a/drivers/gpu/drm/panel/panel-s6e3ha2.c
+++ b/drivers/gpu/drm/panel/panel-s6e3ha2.c
@@ -490,39 +490,9 @@ static void s6e3ha2_panel_init(struct s6e3ha2 *ctx)
s6e3ha2_single_dsi_set1(ctx);
s6e3ha2_single_dsi_set2(ctx);
- /* calibration enable */
s6e3ha2_test_key_on_fc(ctx);
s6e3ha2_freq_calibration(ctx);
-
- msleep(120);
-
- /* common setting */
- s6e3ha2_dcs_write_seq_static(ctx, MIPI_DCS_SET_TEAR_ON, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
-
- s6e3ha2_touch_hsync_on1(ctx);
- s6e3ha2_pentile_control(ctx);
- s6e3ha2_poc_global(ctx);
- s6e3ha2_poc_setting(ctx);
s6e3ha2_test_key_off_fc(ctx);
-
- /* pcd setting off for TB */
- s6e3ha2_pcd_set_off(ctx);
- s6e3ha2_err_fg_set(ctx);
- s6e3ha2_te_start_setting(ctx);
-
- /* brightness setting */
- s6e3ha2_set_brightness(ctx->bl_dev);
- s6e3ha2_aor_control(ctx);
- s6e3ha2_caps_elvss_set(ctx);
- s6e3ha2_gamma_update(ctx);
- s6e3ha2_acl_off(ctx);
- s6e3ha2_acl_off_opr(ctx);
- s6e3ha2_hbm_off(ctx);
-
- /* elvss temp compensation */
- s6e3ha2_test_global(ctx);
- s6e3ha2_test(ctx);
-
s6e3ha2_test_key_off_f0(ctx);
}
@@ -610,6 +580,40 @@ static int s6e3ha2_enable(struct drm_panel *panel)
{
struct s6e3ha2 *ctx = panel_to_s6e3ha2(panel);
+ msleep(120);
+
+ /* common setting */
+ s6e3ha2_dcs_write_seq_static(ctx, MIPI_DCS_SET_TEAR_ON, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+
+ s6e3ha2_test_key_on_f0(ctx);
+
+ s6e3ha2_test_key_on_fc(ctx);
+ s6e3ha2_touch_hsync_on1(ctx);
+ s6e3ha2_pentile_control(ctx);
+ s6e3ha2_poc_global(ctx);
+ s6e3ha2_poc_setting(ctx);
+ s6e3ha2_test_key_off_fc(ctx);
+
+ /* pcd setting off for TB */
+ s6e3ha2_pcd_set_off(ctx);
+ s6e3ha2_err_fg_set(ctx);
+ s6e3ha2_te_start_setting(ctx);
+
+
+ /* brightness setting */
+ s6e3ha2_set_brightness(ctx->bl_dev);
+ s6e3ha2_aor_control(ctx);
+ s6e3ha2_caps_elvss_set(ctx);
+ s6e3ha2_gamma_update(ctx);
+ s6e3ha2_acl_off(ctx);
+ s6e3ha2_acl_off_opr(ctx);
+ s6e3ha2_hbm_off(ctx);
+
+ /* elvss temp compensation */
+ s6e3ha2_test_global(ctx);
+ s6e3ha2_test(ctx);
+ s6e3ha2_test_key_off_f0(ctx);
+
s6e3ha2_dcs_write_seq_static(ctx, MIPI_DCS_SET_DISPLAY_ON);
if (ctx->error != 0)
return ctx->error;