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author | Jaehoon Chung <jh80.chung@samsung.com> | 2015-05-06 17:04:42 +0900 |
---|---|---|
committer | Seung-Woo Kim <sw0312.kim@samsung.com> | 2016-12-14 13:44:47 +0900 |
commit | 25dbb613336205a5e6428be94151206d61a21000 (patch) | |
tree | 985e137c75a60878a806e1ed672df097866f7460 | |
parent | d9e80b73ab990efe77bbec545c462a02647b46f0 (diff) |
Revert "local/mmc: dw_mmc: exynos: Change SAMPLE_CLK_TUNING bit"
This reverts commit 92101b1171a6b10b150d9c905372322c97a29cbd.
-rw-r--r-- | drivers/mmc/host/dw_mmc-exynos.c | 2 | ||||
-rw-r--r-- | drivers/mmc/host/dw_mmc-exynos.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c index 6b5843279348..6934b92c0d72 100644 --- a/drivers/mmc/host/dw_mmc-exynos.c +++ b/drivers/mmc/host/dw_mmc-exynos.c @@ -442,7 +442,7 @@ static inline u8 dw_mci_exynos_move_next_clksmpl(struct dw_mci *host) sample = (clksel + 1) & 0x7; clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample) | - SDMMC_CLKSEL_SAMPLE_CLK_TUNING(0x3); + SDMMC_CLKSEL_SAMPLE_CLK_TUNING; if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) diff --git a/drivers/mmc/host/dw_mmc-exynos.h b/drivers/mmc/host/dw_mmc-exynos.h index 588ec167c7ea..c1f5d36e0b53 100644 --- a/drivers/mmc/host/dw_mmc-exynos.h +++ b/drivers/mmc/host/dw_mmc-exynos.h @@ -34,7 +34,7 @@ SDMMC_CLKSEL_CCLK_DRIVE(y) | \ SDMMC_CLKSEL_CCLK_DIVIDER(z)) #define SDMMC_CLKSEL_TIMING_MASK SDMMC_CLKSEL_TIMING(0x7, 0x7, 0x7) -#define SDMMC_CLKSEL_SAMPLE_CLK_TUNING(x) ((x) << 6) +#define SDMMC_CLKSEL_SAMPLE_CLK_TUNING BIT(6) #define SDMMC_CLKSEL_WAKEUP_INT BIT(11) /* RCLK_EN register defines */ |