diff options
| author | Jaehoon Chung <jh80.chung@samsung.com> | 2015-05-06 17:04:20 +0900 |
|---|---|---|
| committer | Seung-Woo Kim <sw0312.kim@samsung.com> | 2016-12-14 13:44:46 +0900 |
| commit | 3b981324195a93774878c0d9da20303048c76f38 (patch) | |
| tree | a8665413c84a7a252b46a77706fad2f50d395aa4 | |
| parent | 6a9ed3e4b695652f5e44a6ed14d3e50febf562af (diff) | |
Revert "local/mmc: dw_mmc: exynos: dynamically adjust the SAMPLE_CLK_TUNING"
This reverts commit 00708afdac0283962f51c94bb74e1a67238e4573.
| -rw-r--r-- | drivers/mmc/host/dw_mmc-exynos.c | 20 |
1 files changed, 6 insertions, 14 deletions
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c index 5c9c20384d8a..90cdafcd4d48 100644 --- a/drivers/mmc/host/dw_mmc-exynos.c +++ b/drivers/mmc/host/dw_mmc-exynos.c @@ -433,9 +433,8 @@ static inline void dw_mci_exynos_set_clksmpl(struct dw_mci *host, u8 sample) static inline u8 dw_mci_exynos_move_next_clksmpl(struct dw_mci *host) { struct dw_mci_exynos_priv_data *priv = host->priv; - const u8 clk_tuning[] = {3, 0}; u32 clksel; - u8 sample, idx; + u8 sample; if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) @@ -444,21 +443,14 @@ static inline u8 dw_mci_exynos_move_next_clksmpl(struct dw_mci *host) clksel = mci_readl(host, CLKSEL); sample = (clksel + 1) & 0x7; - clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample); - - if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || - priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) { - /* - * Workaround for Exynos5433 TM2 board. - * If other Exynos variants are not working, - * needs to set other value. - */ - idx = sample / 7; - clksel |= SDMMC_CLKSEL_SAMPLE_CLK_TUNING(clk_tuning[idx]) | + clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample) | + SDMMC_CLKSEL_SAMPLE_CLK_TUNING(0x3) | SDMMC_CLKSEL_CORE_CLK_TUNING(0x1); + if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || + priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) mci_writel(host, CLKSEL64, clksel); - } else + else mci_writel(host, CLKSEL, clksel); return sample; |