diff options
| author | Chanwoo Choi <cw00.choi@samsung.com> | 2015-04-29 17:21:50 +0900 |
|---|---|---|
| committer | Seung-Woo Kim <sw0312.kim@samsung.com> | 2016-12-14 13:44:24 +0900 |
| commit | 408811bf1b3dbaaae84ba57f3a62515cbd9c88fb (patch) | |
| tree | 12d4a3094e9bd22f97fc980c856f7bc13a57abce | |
| parent | af5e231b9a7f7dc231c1df51376caa52e07371e6 (diff) | |
arm64: dts: exynos: Reduce the clock-latency of big.LITTLE core
This patch reduces the clock-latency of big.LITTLE core because too much
clock-latency has the direct influence of determining the sampling rate
of CPUFREQ governor. After applied this patch, the sampling rate is 100ms
from 1000ms.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynos5433.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index c7f91cebb6b1..e1a972ce6208 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -44,7 +44,7 @@ clocks = <&cmu_apollo CLK_SCLK_APOLLO>; clock-names = "cpu-cluster.1"; - clock-latency = <1000000>; + clock-latency = <100000>; #cooling-cells = <2>; operating-points = < @@ -91,7 +91,7 @@ clocks = <&cmu_atlas CLK_SCLK_ATLAS>; clock-names = "cpu-cluster.0"; - clock-latency = <1000000>; + clock-latency = <100000>; #cooling-cells = <2>; operating-points = < |