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author | Marek Szyprowski <m.szyprowski@samsung.com> | 2015-08-31 13:52:43 +0200 |
---|---|---|
committer | Seung-Woo Kim <sw0312.kim@samsung.com> | 2016-12-14 13:50:34 +0900 |
commit | 5d36736404a5802d9478ca3e38808e86af6875a2 (patch) | |
tree | d2e458e2473d42eabcf634c81c33d2c384a79847 | |
parent | de74dc827fdcf76477537d67e0daf922085b8cfd (diff) |
clk: samsung: exynos5422: fix MFC clock hierarchy parent
Proper source for MFC block is mout_user_aclk333 (in datasheet named
USER_MUX_ACLK_333), not the output of CLKDIV_ACLK_333 MUX.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
-rw-r--r-- | drivers/clk/samsung/clk-exynos5420.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 5e70e4d12dbb..03cdea4f3789 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -930,7 +930,7 @@ static struct samsung_gate_clock exynos5x_gate_clks[] __initdata = { GATE_BUS_TOP, 13, 0, 0), GATE(0, "aclk166", "mout_user_aclk166", GATE_BUS_TOP, 14, CLK_IGNORE_UNUSED, 0), - GATE(0, "aclk333", "mout_aclk333", + GATE(0, "aclk333", "mout_user_aclk333", GATE_BUS_TOP, 15, CLK_IGNORE_UNUSED, 0), GATE(0, "aclk400_isp", "mout_user_aclk400_isp", GATE_BUS_TOP, 16, 0, 0), |