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authorJaehoon Chung <jh80.chung@samsung.com>2015-05-06 17:04:52 +0900
committerSeung-Woo Kim <sw0312.kim@samsung.com>2016-12-14 13:44:48 +0900
commit941335054b567222dc679aecf4662d25161f9891 (patch)
treef925584c703eb1a2cfdfa6699c2a39f633582d21
parent25dbb613336205a5e6428be94151206d61a21000 (diff)
Revert "local/mmc: dw_mmc: exynos: Add SAMPLE_CLK_TUNING bit for eMMC"
This reverts commit 7dc119dc74b5ad514588973d7b735ef46cab1009.
-rw-r--r--drivers/mmc/host/dw_mmc-exynos.c3
-rw-r--r--drivers/mmc/host/dw_mmc-exynos.h1
2 files changed, 1 insertions, 3 deletions
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c
index 6934b92c0d72..7bf7054e776c 100644
--- a/drivers/mmc/host/dw_mmc-exynos.c
+++ b/drivers/mmc/host/dw_mmc-exynos.c
@@ -441,8 +441,7 @@ static inline u8 dw_mci_exynos_move_next_clksmpl(struct dw_mci *host)
clksel = mci_readl(host, CLKSEL);
sample = (clksel + 1) & 0x7;
- clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample) |
- SDMMC_CLKSEL_SAMPLE_CLK_TUNING;
+ clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample);
if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 ||
priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU)
diff --git a/drivers/mmc/host/dw_mmc-exynos.h b/drivers/mmc/host/dw_mmc-exynos.h
index c1f5d36e0b53..923aad5fe1c0 100644
--- a/drivers/mmc/host/dw_mmc-exynos.h
+++ b/drivers/mmc/host/dw_mmc-exynos.h
@@ -34,7 +34,6 @@
SDMMC_CLKSEL_CCLK_DRIVE(y) | \
SDMMC_CLKSEL_CCLK_DIVIDER(z))
#define SDMMC_CLKSEL_TIMING_MASK SDMMC_CLKSEL_TIMING(0x7, 0x7, 0x7)
-#define SDMMC_CLKSEL_SAMPLE_CLK_TUNING BIT(6)
#define SDMMC_CLKSEL_WAKEUP_INT BIT(11)
/* RCLK_EN register defines */