diff options
| author | Jaehoon Chung <jh80.chung@samsung.com> | 2015-05-06 17:04:33 +0900 |
|---|---|---|
| committer | Seung-Woo Kim <sw0312.kim@samsung.com> | 2016-12-14 13:44:47 +0900 |
| commit | d9e80b73ab990efe77bbec545c462a02647b46f0 (patch) | |
| tree | c913a9da8135ac259fb6f6032208ff9dcd365510 | |
| parent | 3b981324195a93774878c0d9da20303048c76f38 (diff) | |
Revert "local/mmc: dw_mmc: exynos: use the bits relevant to clock tuning"
This reverts commit 22d09e72e4b98e60c9e835dfcc19653461b1fb82.
| -rw-r--r-- | drivers/mmc/host/dw_mmc-exynos.c | 7 | ||||
| -rw-r--r-- | drivers/mmc/host/dw_mmc-exynos.h | 10 |
2 files changed, 3 insertions, 14 deletions
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c index 90cdafcd4d48..6b5843279348 100644 --- a/drivers/mmc/host/dw_mmc-exynos.c +++ b/drivers/mmc/host/dw_mmc-exynos.c @@ -139,8 +139,7 @@ static void dw_mci_exynos_set_clksel_timing(struct dw_mci *host, u32 timing) else clksel = mci_readl(host, CLKSEL); - clksel = (clksel & ~(SDMMC_CLKSEL_TIMING_MASK | - SDMMC_CLKSEL_TUNING_MASK)) | timing; + clksel = (clksel & ~SDMMC_CLKSEL_TIMING_MASK) | timing; if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) @@ -421,7 +420,6 @@ static inline void dw_mci_exynos_set_clksmpl(struct dw_mci *host, u8 sample) clksel = mci_readl(host, CLKSEL64); else clksel = mci_readl(host, CLKSEL); - clksel &= ~SDMMC_CLKSEL_TUNING_MASK; clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample); if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) @@ -444,8 +442,7 @@ static inline u8 dw_mci_exynos_move_next_clksmpl(struct dw_mci *host) sample = (clksel + 1) & 0x7; clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample) | - SDMMC_CLKSEL_SAMPLE_CLK_TUNING(0x3) | - SDMMC_CLKSEL_CORE_CLK_TUNING(0x1); + SDMMC_CLKSEL_SAMPLE_CLK_TUNING(0x3); if (priv->ctrl_type == DW_MCI_TYPE_EXYNOS7 || priv->ctrl_type == DW_MCI_TYPE_EXYNOS7_SMU) diff --git a/drivers/mmc/host/dw_mmc-exynos.h b/drivers/mmc/host/dw_mmc-exynos.h index 3b144609f096..588ec167c7ea 100644 --- a/drivers/mmc/host/dw_mmc-exynos.h +++ b/drivers/mmc/host/dw_mmc-exynos.h @@ -34,15 +34,7 @@ SDMMC_CLKSEL_CCLK_DRIVE(y) | \ SDMMC_CLKSEL_CCLK_DIVIDER(z)) #define SDMMC_CLKSEL_TIMING_MASK SDMMC_CLKSEL_TIMING(0x7, 0x7, 0x7) -#define SDMMC_CLKSEL_SAMPLE_CLK_TUNING(x) (((x) & 0x3) << 6) -#define SDMMC_CLKSEL_SAMPLE_CLK_TUNING_MASK (0x3 << 6) -#define SDMMC_CLKSEL_DRV_CLK_TUNING(x) (((x) & 0x3) << 22) -#define SDMMC_CLKSEL_DRV_CLK_TUNING_MASK (0x3 << 22) -#define SDMMC_CLKSEL_CORE_CLK_TUNING(x) (((x) & 0x3) << 30) -#define SDMMC_CLKSEL_CORE_CLK_TUNING_MASK (0x3 << 30) -#define SDMMC_CLKSEL_TUNING_MASK (SDMMC_CLKSEL_CORE_CLK_TUNING_MASK | \ - SDMMC_CLKSEL_DRV_CLK_TUNING_MASK | \ - SDMMC_CLKSEL_SAMPLE_CLK_TUNING_MASK) +#define SDMMC_CLKSEL_SAMPLE_CLK_TUNING(x) ((x) << 6) #define SDMMC_CLKSEL_WAKEUP_INT BIT(11) /* RCLK_EN register defines */ |