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authorJoonyoung Shim <jy0922.shim@samsung.com>2015-04-06 19:09:37 +0900
committerSeung-Woo Kim <sw0312.kim@samsung.com>2016-12-14 13:42:38 +0900
commit77d20ce0bff08dc74d8e5d69bc5272ccf0d3f0b5 (patch)
tree43ff9363aea7a1df48558a1c7d5d6bf168081dc2
parent9bc4c517c8630cb91ce00c0f5b74cb9e545d26a2 (diff)
gpu: arm: midgard: register opp table for mali devfreq
This needs to support mali devfreq. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
-rw-r--r--drivers/gpu/arm/midgard/platform/exynos5433/exynos5433.c20
1 files changed, 16 insertions, 4 deletions
diff --git a/drivers/gpu/arm/midgard/platform/exynos5433/exynos5433.c b/drivers/gpu/arm/midgard/platform/exynos5433/exynos5433.c
index 5b2c2a85d23d..8a8352452789 100644
--- a/drivers/gpu/arm/midgard/platform/exynos5433/exynos5433.c
+++ b/drivers/gpu/arm/midgard/platform/exynos5433/exynos5433.c
@@ -7,10 +7,9 @@
*/
#include <linux/regulator/consumer.h>
+#include <linux/pm_opp.h>
#include <mali_kbase.h>
-/* TODO: support DVFS */
-
struct mali_data {
struct device *dev;
struct regulator *vdd_g3d;
@@ -30,29 +29,42 @@ static int exynos5433_platform_init(struct kbase_device *kbdev)
/* TODO: check g3d power domain */
+ ret = of_init_opp_table(dev);
+ if (ret < 0) {
+ dev_err(dev, "failed to get OPP table\n");
+ return ret;
+ }
+
mali->vdd_g3d = devm_regulator_get(dev, "vdd_g3d");
if (IS_ERR(mali->vdd_g3d)) {
dev_err(dev, "Failed to get vdd_g3d regulator\n");
- return PTR_ERR(mali->vdd_g3d);
+ ret = PTR_ERR(mali->vdd_g3d);
+ goto err;
}
/* TODO: check regulator voltage */
ret = regulator_enable(mali->vdd_g3d);
if (ret < 0) {
dev_err(dev, "Failed to enable vdd_g3d regulator\n");
- return ret;
+ goto err;
}
kbdev->platform_context = mali;
return 0;
+
+err:
+ of_free_opp_table(dev);
+ return ret;
}
static void exynos5433_platform_term(struct kbase_device *kbdev)
{
+ struct device *dev = kbdev->dev;
struct mali_data *mali = kbdev->platform_context;
regulator_disable(mali->vdd_g3d);
+ of_free_opp_table(dev);
kbdev->platform_context = NULL;
}