diff options
| author | Richard Fitzgerald <rf@opensource.cirrus.com> | 2021-10-15 14:36:17 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2021-10-15 16:14:21 +0100 |
| commit | 0c3d6c6ff75aa6b21cd4ac872dd3050b6525c75c (patch) | |
| tree | dbf2a1d608a3a62035a5480b4c26e0dffea879eb | |
| parent | fdbd256175a1e11c1ba827112d56b9a3952e1219 (diff) | |
ASoC: cs42l42: Mark OSC_SWITCH_STATUS register volatile
OSC_SWITCH_STATUS is a volatile register indicating the current state
of the clock switch logic.
Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20211015133619.4698-15-rf@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | sound/soc/codecs/cs42l42.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c index d62272d0ab8c..390cd7ea3a7f 100644 --- a/sound/soc/codecs/cs42l42.c +++ b/sound/soc/codecs/cs42l42.c @@ -52,7 +52,6 @@ static const struct reg_default cs42l42_reg_defaults[] = { { CS42L42_RSENSE_CTL1, 0x40 }, { CS42L42_RSENSE_CTL2, 0x00 }, { CS42L42_OSC_SWITCH, 0x00 }, - { CS42L42_OSC_SWITCH_STATUS, 0x05 }, { CS42L42_RSENSE_CTL3, 0x1B }, { CS42L42_TSENSE_CTL, 0x1B }, { CS42L42_TSRS_INT_DISABLE, 0x00 }, @@ -331,6 +330,7 @@ static bool cs42l42_volatile_register(struct device *dev, unsigned int reg) case CS42L42_DEVID_CD: case CS42L42_DEVID_E: case CS42L42_MCLK_STATUS: + case CS42L42_OSC_SWITCH_STATUS: case CS42L42_TRSENSE_STATUS: case CS42L42_HS_DET_STATUS: case CS42L42_ADC_OVFL_STATUS: |