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| author | Giulio Benetti <giulio.benetti@micronovasrl.com> | 2018-02-15 18:54:48 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-02-16 21:16:03 +0100 |
| commit | fa4127c5eb8def998fd8a471d51a4f2560dea0a2 (patch) | |
| tree | e463a25d2caa1c25a2576205f50c4c5848b8ba51 /Documentation/device-mapper/unstriped.txt | |
| parent | cd0e93d865538decfd0f917c112d3fc57aac90fe (diff) | |
drm/sun4i: fix HSYNC and VSYNC polarity
Differently from other Lcd signals, HSYNC and VSYNC signals
result inverted if their bits are cleared to 0.
Invert their settings of IO_POL register.
Signed-off-by: Giulio Benetti <giulio.benetti@micronovasrl.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1518717288-123578-1-git-send-email-giulio.benetti@micronovasrl.com
Diffstat (limited to 'Documentation/device-mapper/unstriped.txt')
0 files changed, 0 insertions, 0 deletions