summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/r7s72100-gr-peach.dts
diff options
context:
space:
mode:
authorMichal Wajdeczko <michal.wajdeczko@intel.com>2021-10-08 14:56:33 -0700
committerAndi Shyti <andi.shyti@linux.intel.com>2022-01-06 13:50:52 +0200
commitcbf88fc029bdb41141c59d36448eb5e230699795 (patch)
treefc9292c284d6d2ba9e0f6400fef55877aa05aab5 /arch/arm/boot/dts/r7s72100-gr-peach.dts
parent58c933b72fd7bfce77d5f833f184b87ebeed6c88 (diff)
drm/i915/guc: Update CT debug macro for multi-tile
Update CT debug macros by including tile ID in all messages. Cc: MichaƂ Winiarski <michal.winiarski@intel.com> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Diffstat (limited to 'arch/arm/boot/dts/r7s72100-gr-peach.dts')
0 files changed, 0 insertions, 0 deletions