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authorVikas Sajjan <vikas.sajjan@samsung.com>2014-09-24 16:45:13 +0900
committerKukjin Kim <kgene.kim@samsung.com>2014-10-21 00:06:35 +0900
commit32ed35ff22ec03d8a935dfe8b90c599da4b4cb02 (patch)
tree4423f15a2c17f83fed540d0b71cd3881ee9f3437 /arch/arm/mach-exynos
parentf114040e3ea6e07372334ade75d1ee0775c355e1 (diff)
ARM: EXYNOS: Move Disabling of JPEG USE_RETENTION for exynos5250 to pmu.c
Move the Disabling of JPEG USE_RETENTION for exynos5250 to pmu.c to make way for refactoring of pm.c and to create common functions across exynos4 and exynos5250. Signed-off-by: Vikas Sajjan <vikas.sajjan@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos')
-rw-r--r--arch/arm/mach-exynos/pm.c7
-rw-r--r--arch/arm/mach-exynos/pmu.c1
2 files changed, 2 insertions, 6 deletions
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index abefacb45976..31e209b38f41 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -255,13 +255,8 @@ static void exynos_pm_prepare(void)
s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
- if (soc_is_exynos5250()) {
+ if (soc_is_exynos5250())
s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save));
- /* Disable USE_RETENTION of JPEG_MEM_OPTION */
- tmp = pmu_raw_readl(EXYNOS5_JPEG_MEM_OPTION);
- tmp &= ~EXYNOS5_OPTION_USE_RETENTION;
- pmu_raw_writel(tmp, EXYNOS5_JPEG_MEM_OPTION);
- }
/* Set value of power down register for sleep mode */
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index ff9d23f0a7d9..cfc62e86cdee 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -264,6 +264,7 @@ static const struct exynos_pmu_conf exynos5250_pmu_config[] = {
{ EXYNOS5_INTRAM_MEM_SYS_PWR_REG, { 0x3, 0x0, 0x0} },
{ EXYNOS5_INTROM_MEM_SYS_PWR_REG, { 0x3, 0x0, 0x0} },
{ EXYNOS5_JPEG_MEM_SYS_PWR_REG, { 0x3, 0x0, 0x0} },
+ { EXYNOS5_JPEG_MEM_OPTION, { 0x10, 0x10, 0x0} },
{ EXYNOS5_HSI_MEM_SYS_PWR_REG, { 0x3, 0x0, 0x0} },
{ EXYNOS5_MCUIOP_MEM_SYS_PWR_REG, { 0x3, 0x0, 0x0} },
{ EXYNOS5_SATA_MEM_SYS_PWR_REG, { 0x3, 0x0, 0x0} },