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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-01 19:55:06 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-01 19:55:06 -0700 |
| commit | 68e24ba70465b82ad24e0774ceab5360180d4627 (patch) | |
| tree | 5d2b8e22e556360f353b2d1c73a19aaf6c5becd9 /arch/arm/mach-mmp/include/mach/gpio-pxa.h | |
| parent | b4beb4bf9934d151bf4581a54ae028927374cb2a (diff) | |
| parent | 5725aeae5ff2e39f3815bbef788ee326c9afea2c (diff) | |
Merge branch 'next/fixes' of git://git.linaro.org/people/arnd/arm-soc
* 'next/fixes' of git://git.linaro.org/people/arnd/arm-soc: (28 commits)
ARM: pxa/cm-x300: properly set bt_reset pin
ARM: mmp: rename SHEEVAD to GPLUGD
ARM: imx: Fix typo 'MACH_MX31_3DS_MXC_NAND_USE_BBT'
ARM: i.MX28: shift frac value in _CLK_SET_RATE
plat-mxc: iomux-v3.h: implicitly enable pull-up/down when that's desired
ARM: mx5: fix clock usage for suspend
ARM: pxa: use correct __iomem annotations
ARM: pxa: sharpsl pm needs SPI
ARM: pxa: centro and treo680 need palm27x
ARM: pxa: make pxafb_smart_*() empty when not enabled
ARM: pxa: select POWER_SUPPLY on raumfeld
ARM: pxa: pxa95x is incompatible with earlier pxa
ARM: pxa: CPU_FREQ_TABLE is needed for CPU_FREQ
ARM: pxa: pxa95x/saarb depends on pxa3xx code
ARM: pxa: allow selecting just one of TREO680/CENTRO
ARM: pxa: export symbols from pxa3xx-ulpi
ARM: pxa: make zylonite_pxa*_init declaration match code
ARM: pxa/z2: fix building error of pxa27x_cpu_suspend() no longer available
ARM: at91: add defconfig for at91sam9g45 family
ARM: at91: remove dependency for Atmel PWM driver selector in Kconfig
...
Diffstat (limited to 'arch/arm/mach-mmp/include/mach/gpio-pxa.h')
| -rw-r--r-- | arch/arm/mach-mmp/include/mach/gpio-pxa.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h index c017a983eced..d14eeaf16322 100644 --- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h +++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h @@ -7,7 +7,7 @@ #define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000) #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) -#define GPIO_REG(x) (*((volatile u32 *)(GPIO_REGS_VIRT + (x)))) +#define GPIO_REG(x) (GPIO_REGS_VIRT + (x)) #define NR_BUILTIN_GPIO IRQ_GPIO_NUM |