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authorChristoffer Dall <christoffer.dall@linaro.org>2016-05-25 15:26:34 +0100
committerChristoffer Dall <christoffer.dall@linaro.org>2016-05-31 16:12:09 +0200
commitfa89c77e891917b5913f9be080f9131a9457bb3e (patch)
treec8ec2fe73a3cd54b18f118f1cd3aa864c15144e5 /arch/arm64
parent4d3afc9bad2b67b118a0cc204dc94703f7a44e74 (diff)
KVM: arm/arm64: vgic-v3: Clear all dirty LRs
When saving the state of the list registers, it is critical to reset them zero, as we could otherwise leave unexpected EOI interrupts pending for virtual level interrupts. Cc: stable@vger.kernel.org # v4.6+ Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/kvm/hyp/vgic-v3-sr.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm64/kvm/hyp/vgic-v3-sr.c b/arch/arm64/kvm/hyp/vgic-v3-sr.c
index fff7cd42b3a3..3129df9d3a73 100644
--- a/arch/arm64/kvm/hyp/vgic-v3-sr.c
+++ b/arch/arm64/kvm/hyp/vgic-v3-sr.c
@@ -190,12 +190,11 @@ void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu)
if (!(vcpu->arch.vgic_cpu.live_lrs & (1UL << i)))
continue;
- if (cpu_if->vgic_elrsr & (1 << i)) {
+ if (cpu_if->vgic_elrsr & (1 << i))
cpu_if->vgic_lr[i] &= ~ICH_LR_STATE;
- continue;
- }
+ else
+ cpu_if->vgic_lr[i] = __gic_v3_get_lr(i);
- cpu_if->vgic_lr[i] = __gic_v3_get_lr(i);
__gic_v3_set_lr(0, i);
}