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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-03 13:28:14 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-03 13:28:14 -0700
commitd6748066ad0e8b2514545998f8367ebb3906f299 (patch)
treef7a9bfd764a8fb781aeda0ef2249afbab42dddf7 /arch/mips/netlogic/xlr/smp.c
parentf04c045f8ce69c22bda9d99eb927276b776135fc (diff)
parent3ba1e543ab4b02640d396098f2f6a199560d5f2d (diff)
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (37 commits) MIPS: O32: Provide definition of registers ta0 .. ta3. MIPS: perf: Add Octeon support for hardware perf. MIPS: perf: Add support for 64-bit perf counters. MIPS: perf: Reorganize contents of perf support files. MIPS: perf: Cleanup formatting in arch/mips/kernel/perf_event.c MIPS: Add accessor macros for 64-bit performance counter registers. MIPS: Add probes for more Octeon II CPUs. MIPS: Add more CPU identifiers for Octeon II CPUs. MIPS: XLR, XLS: Add comment for smp setup MIPS: JZ4740: GPIO: Check correct IRQ in demux handler MIPS: JZ4740: GPIO: Simplify IRQ demuxer MIPS: JZ4740: Use generic irq chip MIPS: Alchemy: remove all CONFIG_SOC_AU1??? defines MIPS: Alchemy: kill au1xxx.h header MIPS: Alchemy: clean DMA code of CONFIG_SOC_AU1??? defines MIPS, IDE: Alchem, au1xxx-ide: Remove pb1200/db1200 header dep MIPS: Alchemy: Redo PCI as platform driver MIPS: Alchemy: more base address cleanup MIPS: Alchemy: rewrite USB platform setup. MIPS: Alchemy: abstract USB block control register access ... Fix up trivial conflicts in: arch/mips/alchemy/devboards/db1x00/platform.c drivers/ide/Kconfig drivers/mmc/host/au1xmmc.c drivers/video/Kconfig sound/mips/Kconfig
Diffstat (limited to 'arch/mips/netlogic/xlr/smp.c')
-rw-r--r--arch/mips/netlogic/xlr/smp.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/mips/netlogic/xlr/smp.c b/arch/mips/netlogic/xlr/smp.c
index d842bce5c940..080284ded508 100644
--- a/arch/mips/netlogic/xlr/smp.c
+++ b/arch/mips/netlogic/xlr/smp.c
@@ -158,6 +158,10 @@ void __init nlm_smp_setup(void)
num_cpus = 1;
for (i = 0; i < NR_CPUS; i++) {
+ /*
+ * BSP is not set in nlm_cpu_ready array, it is only for
+ * ASPs (goto see smpboot.S)
+ */
if (nlm_cpu_ready[i]) {
cpu_set(i, phys_cpu_present_map);
__cpu_number_map[i] = num_cpus;
@@ -191,7 +195,7 @@ struct plat_smp_ops nlm_smp_ops = {
unsigned long secondary_entry_point;
-int nlm_wakeup_secondary_cpus(u32 wakeup_mask)
+int __cpuinit nlm_wakeup_secondary_cpus(u32 wakeup_mask)
{
unsigned int tid, pid, ipi, i, boot_cpu;
void *reset_vec;