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authorChris Dearman <chris@mips.com>2007-05-24 22:30:18 +0100
committerRalf Baechle <ralf@linux-mips.org>2007-06-11 18:20:53 +0100
commitacaec427bc81199da41fb000ab1979041ebc3289 (patch)
tree15d767c4ebe7c312c9b968a19634b2a929c6308e /arch/mips
parentda9bc7263dc7e32d52dd922fe3f46eb7107c0143 (diff)
[MIPS] Always install the DSP exception handler.
Some non-DSP enabled cores 24K / 34K can generate a DSP exception where they are actually expected to produce a reserved instruction exception. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/kernel/traps.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 3f58b6ac1358..48c8b2597142 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1531,8 +1531,7 @@ void __init trap_init(void)
if (cpu_has_mipsmt)
set_except_vector(25, handle_mt);
- if (cpu_has_dsp)
- set_except_vector(26, handle_dsp);
+ set_except_vector(26, handle_dsp);
if (cpu_has_vce)
/* Special exception: R4[04]00 uses also the divec space. */