diff options
author | Paul Mundt <lethal@linux-sh.org> | 2008-07-29 08:09:44 +0900 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2008-07-29 08:09:44 +0900 |
commit | f15cbe6f1a4b4d9df59142fc8e4abb973302cf44 (patch) | |
tree | 774d7b11abaaf33561ab8268bf51ddd9ceb79025 /arch/sh/include/cpu-sh4/cpu/freq.h | |
parent | 25326277d8d1393d1c66240e6255aca780f9e3eb (diff) |
sh: migrate to arch/sh/include/
This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac.
Most of the moving about was done with Sam's directions at:
http://marc.info/?l=linux-sh&m=121724823706062&w=2
with subsequent hacking and fixups entirely my fault.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include/cpu-sh4/cpu/freq.h')
-rw-r--r-- | arch/sh/include/cpu-sh4/cpu/freq.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/sh/include/cpu-sh4/cpu/freq.h b/arch/sh/include/cpu-sh4/cpu/freq.h new file mode 100644 index 000000000000..c23af81c2e70 --- /dev/null +++ b/arch/sh/include/cpu-sh4/cpu/freq.h @@ -0,0 +1,44 @@ +/* + * include/asm-sh/cpu-sh4/freq.h + * + * Copyright (C) 2002, 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_CPU_SH4_FREQ_H +#define __ASM_CPU_SH4_FREQ_H + +#if defined(CONFIG_CPU_SUBTYPE_SH7722) || \ + defined(CONFIG_CPU_SUBTYPE_SH7723) || \ + defined(CONFIG_CPU_SUBTYPE_SH7343) || \ + defined(CONFIG_CPU_SUBTYPE_SH7366) +#define FRQCR 0xa4150000 +#define VCLKCR 0xa4150004 +#define SCLKACR 0xa4150008 +#define SCLKBCR 0xa415000c +#define IrDACLKCR 0xa4150010 +#define MSTPCR0 0xa4150030 +#define MSTPCR1 0xa4150034 +#define MSTPCR2 0xa4150038 +#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ + defined(CONFIG_CPU_SUBTYPE_SH7780) +#define FRQCR 0xffc80000 +#elif defined(CONFIG_CPU_SUBTYPE_SH7785) +#define FRQCR0 0xffc80000 +#define FRQCR1 0xffc80004 +#define FRQMR1 0xffc80014 +#elif defined(CONFIG_CPU_SUBTYPE_SHX3) +#define FRQCR 0xffc00014 +#else +#define FRQCR 0xffc00000 +#define FRQCR_PSTBY 0x0200 +#define FRQCR_PLLEN 0x0400 +#define FRQCR_CKOEN 0x0800 +#endif +#define MIN_DIVISOR_NR 0 +#define MAX_DIVISOR_NR 3 + +#endif /* __ASM_CPU_SH4_FREQ_H */ + |