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authorDavid S. Miller <davem@davemloft.net>2006-01-31 18:33:00 -0800
committerDavid S. Miller <davem@sunset.davemloft.net>2006-03-20 01:11:22 -0800
commit4da808c352c290d3f762933d44d4ab90c2fd65f3 (patch)
treeda99326440777580a19c345a5b0d52fbf800042b /arch/sparc64/kernel/rtrap.S
parent4753eb2ac7022b999e5e484f1a5dc001dba22bd3 (diff)
[SPARC64]: Fix bogus flush instruction usage.
Some of the trap code was still assuming that alternate global %g6 was hard coded with current_thread_info(). Let's just consistently flush at KERNBASE when we need a pipeline synchronization. That's locked into the TLB and will always work. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc64/kernel/rtrap.S')
-rw-r--r--arch/sparc64/kernel/rtrap.S3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/sparc64/kernel/rtrap.S b/arch/sparc64/kernel/rtrap.S
index 5a62ec5d531c..89794ebdcbcf 100644
--- a/arch/sparc64/kernel/rtrap.S
+++ b/arch/sparc64/kernel/rtrap.S
@@ -259,7 +259,8 @@ rt_continue: ldx [%sp + PTREGS_OFF + PT_V9_G1], %g1
ldx [%l1 + %lo(sparc64_kern_pri_nuc_bits)], %l1
or %l0, %l1, %l0
stxa %l0, [%l7] ASI_DMMU
- flush %g6
+ sethi %hi(KERNBASE), %l7
+ flush %l7
rdpr %wstate, %l1
rdpr %otherwin, %l2
srl %l1, 3, %l1