summaryrefslogtreecommitdiff
path: root/arch/x86/events
diff options
context:
space:
mode:
authorKan Liang <kan.liang@linux.intel.com>2021-08-26 08:32:40 -0700
committerPeter Zijlstra <peterz@infradead.org>2021-08-31 13:59:36 +0200
commit9d756e408e080d40e7916484b00c802026e6d1ad (patch)
tree2df76a89be58bc3354f4608ecfae5c1f59f63a37 /arch/x86/events
parentf42e8a603c88f72bf047a710b9fc1d3579f31e71 (diff)
perf/x86/intel/uncore: Fix Intel SPR CHA event constraints
SPR CHA events have the exact same event constraints as SKX, so add the constraints. Fixes: 949b11381f81 ("perf/x86/intel/uncore: Add Sapphire Rapids server CHA support") Reported-by: Stephane Eranian <eranian@google.com> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/1629991963-102621-5-git-send-email-kan.liang@linux.intel.com
Diffstat (limited to 'arch/x86/events')
-rw-r--r--arch/x86/events/intel/uncore_snbep.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index d941854e4efa..ce85ee5f60f9 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -5649,6 +5649,7 @@ static struct intel_uncore_type spr_uncore_chabox = {
.event_mask = SPR_CHA_PMON_EVENT_MASK,
.event_mask_ext = SPR_RAW_EVENT_MASK_EXT,
.num_shared_regs = 1,
+ .constraints = skx_uncore_chabox_constraints,
.ops = &spr_uncore_chabox_ops,
.format_group = &spr_uncore_chabox_format_group,
.attr_update = uncore_alias_groups,